Robust architecture for mode switching of a force and measure apparatus
AssigneeAnalog Devices International Unlimited Company
InventorsAmit Kumar Singh, Christopher C. McQuilkin
Life of this patent
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Abstract
A stabilization technique is disclosed that suppresses or inhibits glitching behavior on automated test equipment (ATE) during mode transitions. Adjustable stabilizing circuitry can be coupled to at least one of a force voltage circuit or a force current circuit is forcing voltage or current to a device under test (DUT). The adjustable stabilizing circuitry can be adjustably configurable in response to whether at least one of a current clamp or a voltage clamp is in an active clamping mode. In this manner, unwanted glitching behavior associated with mode changes can be reduced or suppressed.
Claims20
A test system for forcing a voltage or a current delivered to an output node for coupling to a device under test (DUT) and measuring the other of the voltage or current at the DUT, the system comprising:
- a force voltage circuit, including or coupled to a voltage feedback path and a current clamp;
- a force current circuit, including or coupled to a current feedback path and a voltage clamp;
- and
- adjustable stabilizing circuitry, coupled to at least one of the force voltage circuit or the force current circuit, the stabilizing circuitry adjustably configurable in response to whether at least one of the current clamp or the voltage clamp is operating in an active clamping mode.
A test system for forcing a voltage or a current delivered to an output node for coupling to a device under test (DUT) and measuring the other of the voltage or current at the DUT, the system comprising:
- a force voltage circuit, including a voltage feedback path and a current clamp;
- a force current circuit, including a current feedback path and a voltage clamp;
- a compensation network;
- and
- a precharge circuit, configured to initialize the compensation network for mode switching the compensation network between operating modes.
A method for forcing a voltage or a current delivered to an output node for coupling to a device under test (DUT) and measuring the other of the voltage or current at the DUT, the method comprising:
- forcing one of a voltage or a current at the output node;
- and
- stabilizing at least one of the forced current or the forced voltage using adjustable stabilizing circuitry in response to whether at least one of voltage clamping or current clamping is occurring at the output node.
Dependencies are inferred from the claim text.