# US 2021/0082935 A1 · Semiconductor storage device and method of manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0082935 A1 - Document ID: US20210082935A1 - Status: Published application - Kind: A1 - Application number: 16/809,753 - Filed: 2020-03-05 - Published: 2021-03-18 - Earliest claimed: 2019-09-13 - Assignees: Kioxia Corporation - Applicants: Kioxia Corporation - Inventors: Yasunori OSHIMA - Web page: https://patentgrep.com/patent/US20210082935A1 ## CPC - H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels - G11C 5/025: {Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device (geometrical lay-out of the components in integrated circuits, geometrical lay-out of the components in integrated circuits H10D89/10)} - G11C 5/06: Arrangements for interconnecting storage elements electrically, e.g. by wiring - H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels - H10D 84/0128: {Manufacturing their channels} - H10D 84/038: {using silicon technology, e.g. SiGe} - H10B 43/10: characterised by the top-view layout - H10B: ELECTRONIC MEMORY DEVICES - G11C: STATIC STORES (semiconductor memory devices H10B) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract In one embodiment, a semiconductor storage device includes a substrate, a stacked film including a plurality of first insulating layers and a plurality of electrode layers that are alternately provided on the substrate, and a second insulating layer provided on the stacked film. The device further includes a plurality of pillar portions, each of which including a first insulator, a charge storage layer, a second insulator, a first semiconductor layer and a third insulator that are sequentially provided in the stacked film and the second insulating layer. Furthermore, a width of the second insulating layer sandwiched between the pillar portions is narrower than a width of the stacked film sandwiched between the pillar portions, in at least a portion of the second insulating layer. ## Claims ### Claim 1 A semiconductor storage device comprising: a substrate; a stacked film including a plurality of first insulating layers and a plurality of electrode layers that are alternately provided on the substrate; a second insulating layer provided on the stacked film; and a plurality of pillar portions, each of which including a first insulator, a charge storage layer, a second insulator, a first semiconductor layer and a third insulator that are sequentially provided in the stacked film and the second insulating layer; wherein a width of the second insulating layer sandwiched between the pillar portions is narrower than a width of the stacked film sandwiched between the pillar portions, in at least a portion of the second insulating layer. ### Claim 2 (depends on 1) The device of claim 1, wherein the second insulating layer includes: a first portion provided on the stacked film; and a second portion provided on the first portion, a width of the second portion sandwiched between the pillar portions being narrower than the width of the stacked film sandwiched between the pillar portions. ### Claim 3 (depends on 2) The device of claim 2, wherein a width of the second portion at a height becomes narrower as the height increases. ### Claim 4 (depends on 1) The device of claim 1, wherein at least a portion of the first semiconductor layer provided in the second insulating layer has a thickness larger than a thickness of the first semiconductor layer provided in the stacked film. ### Claim 5 (depends on 1) The device of claim 1, wherein the first semiconductor layer provided in the stacked film has a thickness of 5 nm or less. ### Claim 6 (depends on 1) The device of claim 1, wherein at least a portion of the first semiconductor layer provided in the second insulating layer has a thickness of 5 nm or more. ### Claim 7 (depends on 1) The device of claim 1, wherein the first semiconductor layer provided in the second insulating layer includes impurity atoms. ### Claim 8 (depends on 7) The device of claim 7, wherein the impurity atoms are B (boron) atoms. ### Claim 9 (depends on 7) The device of claim 7, wherein the impurity atoms are C (carbon) atoms. ### Claim 10 (depends on 2) The device of claim 2, wherein the first semiconductor layer includes: a first region provided on a side face of the stacked film and a side face of the first portion of the second insulating layer through the first insulator; and a second region provided on a side face of the second portion of the second insulating layer through the first insulator, the second region having a thickness larger than a thickness of the first semiconductor layer provided on the side face of the stacked film through the first insulator. ### Claim 11 (depends on 10) The device of claim 10, wherein the first region has a thickness of 5 nm or less. ### Claim 12 (depends on 10) The device of claim 10, wherein the second region has a thickness of 5 nm or more. ### Claim 13 A method of manufacturing a semiconductor storage device, comprising: forming a stacked film on a substrate, the stacked film alternately including a plurality of first insulating layers and a plurality of first films; forming a second insulating layer on the stacked film; forming a plurality of openings in the stacked film and the second insulating layer; processing the second insulating layer such that a width of the second insulating layer sandwiched between the openings is narrower than a width of the stacked film sandwiched between the openings, in at least a portion of the second insulating layer; and forming a plurality of pillar portions in the plurality of openings, each of the pillar portions sequentially including a first insulator, a charge storage layer, a second insulator, a first semiconductor layer and a third insulator; wherein the first semiconductor layer is formed such that a thickness of at least of a portion of the first semiconductor layer formed in the second insulating layer is larger than a thickness of the first semiconductor layer formed in the stacked film. ### Claim 14 (depends on 13) The method of claim 13, wherein the second insulating layer is processed with acid after ion implantation into the second insulating layer. ### Claim 15 (depends on 13) The method of claim 13, wherein the second insulating layer is processed so as to include: a first portion provided on the stacked film; and a second portion provided on the first portion, a width of the second portion sandwiched between the openings being narrower than the width of the stacked film sandwiched between the openings. ### Claim 16 (depends on 15) The method of claim 15, wherein the second portion is processed such that a width of the second portion at a height becomes narrower as the height increases. ### Claim 17 (depends on 15) The method of claim 15, further comprising removing a portion of the second portion after forming the pillar portions. ### Claim 18 (depends on 13) The method of claim 13, comprising implanting impurity atoms into the first semiconductor layer formed in the second insulating layer when the pillar portions are formed. ### Claim 19 (depends on 18) The method of claim 18, wherein the impurity atoms are B (boron) atoms. ### Claim 20 (depends on 18) The method of claim 18, wherein the impurity atoms are C (carbon) atoms.