# US 2021/0082902 A1 · Semiconductor integrated circuit device

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- Number: US 2021/0082902 A1
- Document ID: US20210082902A1
- Status: Published application
- Kind: A1
- Application number: 17/093,400
- Filed: 2020-11-09
- Published: 2021-03-18
- Earliest claimed: 2018-05-22
- Assignees: Socionext Inc.
- Applicants: Socionext Inc.
- Inventors: Isaya Sobue
- Web page: https://patentgrep.com/patent/US20210082902A1

## CPC

- H10D 1/66: Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
- H10D 86/85: characterised by only passive components
- H10D 84/0186: {Manufacturing their interconnections or electrodes, e.g. source or drain electrodes}
- H10D 84/0195: {the components including vertical IGFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/837: {comprising vertical IGFETs}
- H10D 84/85: Complementary IGFETs, e.g. CMOS
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- H10D 30/43: having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
- H10D 62/122: {oriented at angles to substrates, e.g. perpendicular to substrates}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES

## Abstract

A capacitive element using VNW FETs is provided. First and second components each constituting a transistor are arranged in an X direction. From the first component, a first gate interconnect extends away from the second component, and a first top interconnect and a first bottom interconnect extend toward the second component. From the second component, a second gate interconnect extends toward the first component, and a second top interconnect and a second bottom interconnect extend away from the first component. The first top interconnect, the first bottom interconnect, and the second gate interconnect are connected.

## Claims

### Claim 1

A semiconductor integrated circuit device comprising a capacitive element,
wherein
the capacitive element includes a first transistor and a second transistor,
the first transistor has a first component including one vertical nanowire (VNW) FET or a plurality of VNW FETs arranged in a first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
the second transistor has a second component including one VNW FET or a plurality of VNW FETs arranged in the first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
the first component and the second component are placed side by side in the first direction,
the first component includes
a first gate interconnect connected with the gate of the VNW FET, extending from the VNW FET away from the second component in the first direction,
a first top interconnect connected with the top of the VNW FET, extending from the VNW FET toward the second component in the first direction, and
a first bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET toward the second component in the first direction,
the second component includes
a second gate interconnect connected with the gate of the VNW FET, extending from the VNW FET toward the first component in the first direction,
a second top interconnect connected with the top of the VNW FET, extending from the VNW FET away from the first component in the first direction, and
a second bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET away from the first component in the first direction, and
the first top interconnect, the first bottom interconnect, and the second gate interconnect are connected.

### Claim 2 (depends on 1)

The semiconductor integrated circuit device of claim 1, wherein
the first top interconnect is connected with a metal interconnect extending in a second direction perpendicular to the first direction.

### Claim 3

A semiconductor integrated circuit device comprising a capacitive element,
wherein
the capacitive element includes a first transistor and a second transistor,
the first transistor has a first component including one vertical nanowire (VNW) FET or a plurality of VNW FETs arranged in a first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
the second transistor has a second component including one VNW FET or a plurality of VNW FETs arranged in the first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
the first component and the second component are placed side by side in the first direction,
the first component includes
a first gate interconnect connected with the gate of the VNW FET, extending from the VNW FET away from the second component in the first direction,
a first top interconnect connected with the top of the VNW FET, extending from the VNW FET toward the second component in the first direction, and
a first bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET toward the second component in the first direction,
the second component includes
a second gate interconnect connected with the gate of the VNW FET, extending from the VNW FET away from the first component in the first direction,
a second top interconnect connected with the top of the VNW FET, extending from the VNW FET toward the first component in the first direction, and
a second bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET toward the first component in the first direction, and
the first top interconnect and the second top interconnect are connected, and the first bottom interconnect and the second bottom interconnect are connected.

### Claim 4 (depends on 3)

The semiconductor integrated circuit device of claim 3, wherein
the first and second top interconnects are connected with the first and second bottom interconnects.

### Claim 5 (depends on 3)

The semiconductor integrated circuit device of claim 3, wherein
the first and second top interconnects are formed as a single interconnect.

### Claim 6 (depends on 3)

The semiconductor integrated circuit device of claim 3, wherein
the first and second top interconnects are connected with a metal interconnect extending in a second direction perpendicular to the first direction.

### Claim 7 (depends on 3)

The semiconductor integrated circuit device of claim 3, wherein
the first and second bottom interconnects are formed as a single bottom region.

### Claim 8

A semiconductor integrated circuit device comprising a capacitive element,
wherein
the capacitive element includes a first transistor and a second transistor,
the first transistor has a first component including one vertical nanowire (VNW) FET or a plurality of VNW FETs arranged in a first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
the second transistor has a second component including one VNW FET or a plurality of VNW FETs arranged in the first direction with gates, tops, and bottoms of the VNW FETs being independently connected with each other,
the first component and the second component are placed side by side in the first direction,
the first component includes
a first gate interconnect connected with the gate of the VNW FET, extending from the VNW FET toward the second component in the first direction,
a first top interconnect connected with the top of the VNW FET, extending from the VNW FET away from the second component in the first direction, and
a first bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET away from the second component in the first direction,
the second component includes
a second gate interconnect connected with the gate of the VNW FET, extending from the VNW FET toward the first component in the first direction,
a second top interconnect connected with the top of the VNW FET, extending from the VNW FET away from the first component in the first direction, and
a second bottom interconnect connected with the bottom of the VNW FET, extending from the VNW FET away from the first component in the first direction, and
the first gate interconnect and the second gate interconnect are connected.

### Claim 9 (depends on 8)

The semiconductor integrated circuit device of claim 8, wherein
the first and second gate interconnects are formed as a single interconnect.

### Claim 10 (depends on 8)

The semiconductor integrated circuit device of claim 8, wherein
the first and second gate interconnects are connected with a metal interconnect extending in a second direction perpendicular to the first direction.