# US 2021/0082901 A1 · Method for fabrication of high density logic and memory for advanced circuit architecture > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0082901 A1 - Document ID: US20210082901A1 - Status: Published application - Kind: A1 - Application number: 16/854,340 - Filed: 2020-04-21 - Published: 2021-03-18 - Earliest claimed: 2019-09-17 - Assignees: Tokyo Electron Limited - Applicants: Tokyo Electron Limited - Inventors: Mark I. GARDNER; H. Jim Fulford; Jeffrey Smith; Lars Liebmann; Daniel Chanemougame - Web page: https://patentgrep.com/patent/US20210082901A1 ## CPC - H10P 10/12: {Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates (preparing SOI wafers using bonding H10P90/1914)} - H10W 90/00: Package configurations - H10D 62/118: {Nanostructure semiconductor bodies} - H10W 72/013: {of die-attach connectors} - H10W 72/073: {of die-attach connectors} - H10D 88/00: Three-dimensional [3D] integrated devices - H10P 90/1916: {with separation or delamination along an ion implanted layer, e.g. Smart-cut} - H10W 10/181: {Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers} - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract Techniques herein include methods for fabricating high density logic and memory for advanced circuit architecture. The methods can include forming multilayer stacks on separate substrates and forming bonding films over the multilayer stacks, then contacting and bonding the bonding films to form a combined structure including each of the multilayer stacks. The method can be repeated to form additional combinations. In between iterations, transistor devices may be formed from the combined structures. Ionized atom implantation can facilitate cleavage of a substrate destined for growth of additional multilayers, wherein an anneal weakens the substrate at a predetermined penetration depth of the ionized atom implantation. ## Claims ### Claim 1 A method of fabricating a semiconductor device, comprising: forming a first multilayer stack on a first surface of a first substrate, the first substrate having a second surface opposite the first surface of the first substrate, the first multilayer stack comprising alternating layers of a first material and a second material; forming a second multilayer stack on a second surface of a second substrate, the second substrate having a first surface opposite the second surface of the second substrate, the second multilayer stack comprising alternating layers of a third material and a fourth material; implanting ionized atoms to a predetermined depth in the first surface of the second substrate; forming a first bonding film on a top surface of the first multilayer stack and forming a second bonding film on a top surface of the second multilayer stack; aligning the first substrate with the second substrate such that the first bonding film is in contact with the second bonding film; and annealing the first substrate and the second substrate to bond the first bonding film with the second bonding film and form a combined structure, the annealing also weakening a portion of the second substrate approximately at the predetermined depth of the implanting. ### Claim 2 (depends on 1) The method of claim 1, herein the ionized atoms have an atomic number less than 12. ### Claim 3 (depends on 1) The method of claim 1, wherein implanting the ionized atoms includes implanting a first type of ionized atom and implanting a second type of particle. ### Claim 4 (depends on 3) The method of claim 3, wherein the first type of ionized atom is selected from the group consisting of H, H2, He, and boron. ### Claim 5 (depends on 1) The method of claim 1, wherein the first and third material are silicon, and the second and fourth material are SiGe2. ### Claim 6 (depends on 1) The method of claim 1, wherein forming the first bonding film and forming the second bonding film includes performing an oxide deposition process. ### Claim 7 (depends on 6) The method of claim 6, wherein the first bonding film and the second bonding film each have a thickness of 30 angstroms to 300 angstroms. ### Claim 8 (depends on 1) The method of claim 1, wherein forming the first bonding film and forming the second bonding film includes cleaning the top surface of the first multilayer stack and cleaning the top surface of the second multilayer stack using a liquid chemistry to form a chemical oxide film. ### Claim 9 (depends on 8) The method of claim 8, wherein the chemical oxide film has a thickness of 5 angstroms to 30 angstroms. ### Claim 10 (depends on 8) The method of claim 8, wherein forming the first bonding film and forming the second bonding film includes executing an oxide deposition process after the cleaning that deposits an oxide layer on the chemical oxide film, thus forming a bilayer oxide on each of the multilayer stacks. ### Claim 11 (depends on 1) The method of claim 1, wherein the first multilayer stack and the second multilayer stack each have at least four layers. ### Claim 12 (depends on 1) The method of claim 1, further comprising: forming a first carbon-containing bonding film on the first bonding film; and forming a second carbon-containing bonding film on the second bonding film, wherein aligning the first substrate with the second substrate includes the first carbon-containing bonding film being in contact with the second carbon-containing bonding film. ### Claim 13 (depends on 1) The method of claim 1, further comprising: removing the weakened portion of the second substrate. ### Claim 14 (depends on 13) The method of claim 13, further comprising: reducing a cleaved thickness of the second substrate to a predetermined thickness after removing the weakened portion. ### Claim 15 (depends on 14) The method of claim 14, wherein the cleaved thickness of the second substrate is reduced to less than 60 nm. ### Claim 16 (depends on 14) The method of claim 14, further comprising: forming a third multilayer stack on a first surface of a third substrate, the third substrate having a second surface opposite the first surface of the third substrate, the third multilayer stack comprising alternating layers of the third material and the fourth material; forming a fourth multilayer stack on the second substrate of the combined structure, the fourth multilayer stack comprising alternating layers of the first material and the second material with each layer formed by epitaxial growth beginning from a surface formed from removing the weakened portion of the second substrate after thickness reduction; forming a third bonding film on a top surface of the third multilayer stack and forming a fourth bonding film on a top surface of the fourth multilayer stack; aligning the third substrate with the combined structure such that the third bonding film is in contact with the fourth bonding film; and annealing the combined structure and the third substrate to bond the third bonding film with the fourth bonding film, thus making the third substrate part of the combined structure. ### Claim 17 (depends on 16) The method of claim 16, further comprising: implanting ionized atoms to the predetermined depth in the first surface of the third. substrate before forming the third bonding film on the top surface of the third multilayer stack, wherein the annealing the combined structure and the third substrate also weakens a portion of the third substrate approximately at the predetermined depth of the implantating. ### Claim 18 (depends on 17) The method of claim 17, further comprising: removing the weakened portion of the third substrate; and reducing a cleaved thickness of the third substrate to a predetermined thickness after removing the weakened portion. ### Claim 19 A method of fabricating a semiconductor device, comprising: forming a first multilayer stack on a first surface of a first substrate, the first substrate having a second surface opposite the first surface of the first substrate, the first multilayer stack comprising alternating layers of a first material and a second material, the first multilayer stack including at least six layers epitaxially grown; forming a second multilayer stack on a second surface of a second substrate, the second substrate having a first surface opposite the second surface of the second substrate, the second multilayer stack comprising alternating layers of a third material and a fourth material, the second multilayer stack including at least six layers epitaxially grown; implanting ionized atoms to a predetermined depth in the first surface of the second substrate; forming a first bonding film on a top surface of the first multilayer stack and forming a second bonding film on a top surface of the second multilayer stack; aligning the first substrate with the second substrate such that the first bonding film is in contact with the second bonding film; annealing the first substrate and the second substrate to bond the first bonding film with the second bonding film and form a combined structure, the annealing also weakening a portion of the second substrate approximately at the predetermined depth of the implanting; removing the weakened portion of the second substrate; and forming at least one transistor device from the combined structure. ### Claim 20 (depends on 19) The method of claim 19, further comprising: after removing the weakened portion of the second substrate, thinning a remainder of the second substrate to entirely remove the remainder of the second substrate and expose the combined first multilayer stack and second multilayer stack.