Minimization of silicon germanium facets in planar metal oxide semiconductor structures

A device, comprising:

• a semiconductor substrate;
• an n-type metal oxide semiconductor region formed on the substrate;
• and
• a p-type metal oxide semiconductor region formed on the substrate, wherein the p-type metal oxide semiconductor region comprises:
• a plurality of p-type metal oxide semiconductor devices formed on the substrate;
• a plurality of source/drain regions formed from silicon germanium, wherein each source/drain region of the plurality of source/drain regions is positioned adjacent to at least one p-type metal oxide semiconductor of the plurality of p-type metal oxide semiconductor devices, and wherein each source/drain region of the plurality of source/drain regions has a shape that is symmetrical about a plane of symmetry;
• and
• a shallow trench isolation region positioned between two source/drain regions of the plurality of source/drain regions;
• and
• an oxide diffusion layer surround the n-type metal oxide semiconductor region and the p-type metal oxide semiconductor region, wherein the oxide diffusion layer comprises a single intact layer without a diffusion break.