Apparatuses and methods for performing background operations in memory using sensing circuitry

A method comprising:

• storing a first data value in sensing circuitry of a memory device that comprises the sensing circuitry, a memory array, and a static-random access (SRAM) cache;
• comparing, in the sensing circuitry during a refresh operation, the first data value to a plurality of data values stored in memory cells coupled to the select line and the plurality of sense lines of the memory array, wherein the first data value is received from a host without being stored in the memory array;
• comparing, in the sensing circuitry during a different refresh cycle than a refresh cycle utilized to compare the first data value to the plurality of data values, the first data value to a different plurality of data values stored in different memory cells coupled to a different select line and the plurality of sense lines of the memory array;
• writing data indicative of a result of the first comparison of the first data value to the plurality of data values in the SRAM cache of the memory device;
• and
• reading the data indicative of the result from the SRAM cache to another device external to the memory device.

An apparatus, comprising:

• a memory array configured to store a particular data value and a plurality of data values;
• and
• sensing circuitry coupled to the memory array and configured to:
• compare, during a refreshing of the memory array, the particular data value stored in memory cells coupled to a select line and a plurality of sense lines of the memory array to the plurality of data values stored in different memory cells of the memory array coupled to a different select line and the plurality of sense lines, wherein the particular data value is received from a host without being stored in the memory array;
• compare, in the sensing circuitry during a different refresh cycle than a refresh cycle utilized to compare the particular data value to the plurality of data values, the first particular data value to a different plurality of data values stored in additional memory cells coupled to an additional select line and the plurality of sense lines of the memory array;
• provide a column address, corresponding to the result of the first comparison operation of the particular data value to the plurality of data values, including the match, to static random-access memory (SRAM);
• provide a signal to the SRAM to store a first data comprising the column address, a second data comprising a row address of the memory address, and the particular data value responsive to the result of the first comparison operation of the particular data value to the plurality of data values.