Shift register unit and driving method thereof, gate drive circuit, and display device

A gate drive circuit, comprising cascaded multi-stage shift register units, of which each stage shift register unit comprises:

• an input circuit electrically connected to a first node, and configured to control a potential of the first node under control of an input signal of an input terminal;
• a first output circuit configured to output a carry signal to a first output terminal of the shift register unit through an output terminal of the first output circuit, under control of the potential of the first node and a clock signal of a clock signal terminal;
• a second output circuit configured to output a driving signal to a second output terminal of the shift register unit, under control of the potential of the first node and the clock signal of the clock signal terminal;
• a switching circuit electrically connected to the output terminal of the first output circuit and the first output terminal, and configured to control the output terminal of the first output circuit to be electrically connected to the first output terminal in response to a control signal;
• and
• a potential control circuit configured to control the output terminal of the first output circuit to be electrically connected to a first voltage terminal.

A driving method of a shift register unit, the shift register unit comprising:

• an input circuit electrically connected to a first node, and configured to control a potential of the first node under control of an input signal of an input terminal;
• a first output circuit configured to output a carry signal to a first output terminal of the shift register unit through an output terminal of the first output circuit, under control of the potential of the first node and a clock signal of a clock signal terminal;
• a second output circuit configured to output a driving signal to a second output terminal of the shift register unit, under control of the potential of the first node and the clock signal of the clock signal terminal;
• a switching circuit electrically connected to the output terminal of the first output circuit and the first output terminal, and configured to control the output terminal of the first output circuit to be electrically connected to the first output terminal in response to a control signal;
• a potential control circuit configured to control the output terminal of the first output circuit to be electrically connected to a first voltage terminal;
• a first reset circuit configured to reset the first node in response to a first reset signal of a first reset terminal;
• and
• a second reset circuit configured to reset the first node in response to a second reset signal of a second reset terminal;
• the driving method comprises:
• in a first stage of a display phase, controlling a potential of the first node to be at a first level, and controlling the output terminal of the first output circuit to be electrically connected to the first output terminal, to make the first output circuit output the carry signal to the first output terminal through the output terminal of the first output circuit, and make the second output circuit output the driving signal to the second output terminal;
• in a second stage of the display phase, resetting the first node to make the potential of the first node be at a second level, controlling the output terminal of the first output circuit to be electrically connected to the first output terminal, and controlling a potential of the output terminal of the first output circuit to be at the second level, wherein the second level is logically opposite to the first level;
• and
• in a field blanking stage, resetting the first node to make the potential of the first node be at the second level, controlling the output terminal of the first output circuit to be disconnected from the first output terminal, and controlling the potential of the output terminal of the first output circuit to be at the first level.