Apparatus and method for transmitting map information in a memory system
AssigneeSK hynix Inc.
InventorYoung-Ick Cho
Life of this patent
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Abstract
A controller for controlling a memory device can include first circuitry configured to perform a read operation in response to a read request, wherein the read operation includes an address translation, which is performed optionally in response to an inputted physical address, for associating a logical address inputted along with the read request with a physical address, and second circuitry configured to determine a usage frequency regarding map data used for the address translation. The first circuitry and the second circuitry can work independently and separately of each other.
Claims20
A controller for controlling a memory device, the controller comprising:
- first circuitry configured to perform a read operation in response to a read request, wherein the read operation includes an address translation, which is performed when an inputted physical address for the read operation is not valid, the address translation associating a logical address inputted along with the read request with a physical address by mapping the logical address to the associated physical address based on mapping information;
- and
- second circuitry coupled to the first circuitry and configured to determine a usage frequency of the mapping information that indicates a number of times used for the address translation,
- wherein the first circuitry and the second circuitry operate independently and separately from each other.
A method for operating a memory system, comprising:
- performing an operation in response to a request from a host by performing an address translation when the request includes an invalid physical address associated with the request, the address translation mapping a logical address included in the request to a corresponding physical address based on mapping information;
- and
- determining a usage frequency of the mapping information that indicates a number of times used for the address translation,
- wherein the performing of the operation and the determining of the usage frequency are executed using different resources of the memory system from each other.
A data processing system, comprising:
- a host configured to transmit an operation request with a logical address at which the operation is to be performed;
- and
- a memory system configured to receive the operation request from the host and perform a corresponding operation at a location within the memory system, the location identified by a physical address associated with the logical address,
- wherein the memory system includes:
- first circuitry configured to perform an address translation depending on whether the operation request is inputted along with a valid physical address and the address translation mapping the logical address to the associated physical address based on mapping information;
- and
- second circuitry coupled to the first circuitry and configured to determine a usage frequency of the mapping information used for the address translation,
- wherein the first circuitry and the second circuitry operate independently and separately from each other.
Dependencies are inferred from the claim text.