Semiconductor integrated circuit and method of testing semiconductor integrated circuit

A semiconductor integrated circuit comprising:

• a first core that includes a first logic circuit that has a plurality of first scan chains, and a first generator that generates a first test pattern for the plurality of first scan chains;
• a second core that includes a second logic circuit that has a plurality of second scan chains, and a second generator that generates a second test pattern for the plurality of second scan chains;
• a storage circuit that stores a seed for a test pattern at a time when a previous test is finished;
• and
• a controller that controls a test operation of the first and second core tests, wherein
• the controller is configured to:
• read the seed from the storage circuit;
• supply the read seed to the first and second generators;
• perform a test on the first and second cores for a same number of cycles;
• obtain first and second test results respectively from the first and second cores;
• and
• compare the first and second test results.

A method of testing a semiconductor integrated circuit, wherein

• the semiconductor integrated circuit comprises:
• a first core that includes a first logic circuit that has a plurality of first scan chains, and a first generator that generates a first test pattern for the plurality of first scan chains;
• a second core that includes a second logic circuit that has a plurality of second scan chains, and a second generator that generates a second test pattern for the plurality of second scan chains;
• the test method comprises:
• obtaining a seed for a test pattern from the first generator;
• supplying the obtained seed to the second generator;
• performing a test on the first and second cores for a same number of cycles;
• obtaining first and second test results respectively from the first and second cores;
• and
• comparing the first and second test results.