Electrical circuit for testing primary internal signals on an asic

An electrical circuit for testing primary internal signals of an ASIC, only one test pin being provided via which a selection can be carried out of digital signals or of an analog signal to be observed, the electrical circuit comprising:

• a Schmitt trigger situated between the test pin and an output terminal of the electrical circuit, an activation of a test mode being provided when a switching threshold of the Schmitt trigger is exceeded;
• and
• at least one sub-circuit configured for observing a digital signal, each of the at least one sub-circuit including a resistor, an NMOS transistor, and an AND gate, wherein at a first input of the AND gate, the digital signal is present, the resistor being situated between the test pin and a drain terminal of the NMOS transistor, a source terminal of the NMOS transistor being connected to ground, a gate terminal of the NMOS transistor being connected to an output of the AND gate, and a second input of the AND gate being connected to the output terminal of the electrical circuit.