Non-volatile memory and manufacturing method for the same

A non-volatile memory, comprising:

• a substrate;
• at least one shallow trench isolation structure, wherein a top surface of the shallow trench isolation structure is higher than a top surface of the substrate, and a lower portion of the shallow trench isolation structure is embedded in the substrate to define a plurality of active regions in the substrate;
• at least one floating gate structure, located on the substrate and comprising a first gate dielectric layer and a first conductive layer in sequence from bottom to top, wherein the first conductive layer has a first sharp portion and a second sharp portion, the first sharp portion and the second sharp portion are attached to two opposite sidewalls of the shallow trench isolation structure respectively, and tips of the first sharp portion and the second sharp portion are higher than the top surface of the shallow trench isolation structure;
• at least one control gate structure, located on the floating gate structure, covering a partial area of the floating gate structure, and comprising a second gate dielectric layer and a second conductive layer in sequence from bottom to top, wherein a corner formed by one side surface of the floating gate structure and a part of a top surface of the floating gate structure is not covered by the control gate structure, the corner is connected between the first sharp portion and one end of the second sharp portion;
• at least one erasing gate structure located on the substrate, wherein the erasing gate structure is located on a side, which is provided with the corner, of the floating gate structure and comprises a tunneling dielectric layer and an erasing gate conductive layer in sequence from bottom to top, the tunneling dielectric layer covers the first sharp portion, the second sharp portion and a tip part of the corner;
• and
• at least one word line structure, located on the substrate, wherein the word line structure is located on a side, which is away from the corner, of the floating gate structure and comprises a third gate dielectric layer and a word line conductive layer in sequence from bottom to top.