Digital Interface Circuit for Analog-to-Digital Converter
AssigneesSTMicroelectronics International N.V., Stmicroelectronics Application GmbH
InventorsNirav Prashantkumar Trivedi, Sandip Atal, Rolf Nandlinger
Life of this patent
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Abstract
A digital interface circuit includes a queue block configured to be coupled between an analog-to-digital converter (ADC) and a Direct Memory Access (DMA) controller of a processor, where the queue block comprises a command buffer and is configured to: receive a first command from the DMA controller; store the first command in the command buffer; modify the first command in accordance with first control bits of the first command to generate a modified first command; and send the modified first command to the ADC.
Claims20
An analog-to-digital conversion system comprising:
- an analog-to-digital converter (ADC);
- a multiplexer, wherein the multiplexer has a plurality of input channels that are configured to be coupled to a plurality of analog input signals, wherein an output terminal of the multiplexer is coupled to an input terminal of the ADC;
- and
- a digital interface circuit configured to be coupled between the ADC and a processor, wherein the digital interface circuit is configured to:
- receive a sequence of commands from the processor, wherein each command of the sequence of commands comprises a channel number that indicates an input channel of the multiplexer, and comprises control bits for the input channel indicated by the channel number;
- store the sequence of commands in a command buffer of the digital interface circuit;
- and
- modify each command of the sequence of commands in accordance with the control bits.
A digital interface circuit comprising:
- a queue block configured to be coupled between an analog-to-digital converter (ADC) and a first Direct Memory Access (DMA) controller of a processor, wherein the queue block comprises a command buffer and is configured to:
- receive a first command from the first DMA controller, the first command comprising first control bits, the first control bits comprising information indicating a first input channel of the ADC and a first channel oversampling factor for the first input channel;
- store the first command in the command buffer;
- and
- instruct the ADC to sample the first input channel a first number of times by sending the first command to the ADC the first number of times, wherein the first number of times is determined by the first channel oversampling factor.
A method of operating an analog-to-digital conversion system, the method comprising:
- receiving, by a queue block of the analog-to-digital conversion system, a sequence of commands from a processor, wherein the queue block is coupled between the processor and an analog-to-digital converter (ADC), the ADC being coupled to a multiplexer, and the multiplexer having a plurality of input channels connected to a plurality of analog input signals, wherein each command in the sequence of commands comprises control bits for controlling sampling of a respective input channel by the ADC;
- decoding, by the queue block, control bits of each command;
- generating, by the queue block, a modified sequence of commands by modifying each command in accordance with the control bits of each command;
- and
- sending, by the queue block, the modified sequence of commands to the ADC to control operation of the ADC.
Dependencies are inferred from the claim text.