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US 2021/0004237 A1Published application
Generating and executing a control flow
AssigneeMicron Technology, Inc.
InventorsKyle B. Wheeler, Richard C. Murphy, Troy A. Manning, Dean A. Klein
Life of this patent
Estimating the term…
Abstract
Examples of the present disclosure provide apparatuses and methods related to generating and executing a control flow. An example apparatus can include a first device configured to generate control flow instructions, and a second device including an array of memory cells, an execution unit to execute the control flow instructions, and a controller configured to control an execution of the control flow instructions on data stored in the array.
Claims21
1-20. (canceled)
An apparatus comprising:
- a central processing unit (CPU), configured to generate control flow instructions;
- and
- a memory device, including:
- an array of memory cells;
- an execution unit, coupled to the array, to execute the control flow instructions;
- and
- a controller configured to control an execution of the control flow instructions on data stored in the array.
4 more elements
An apparatus comprising:
- a system on a chip (SoC) configured to generate control flow instructions;
- and
- a memory device, including:
- an array of memory cells;
- an execution unit, coupled to the array, to execute the control flow instructions;
- and
- a controller configured to control an execution of the control flow instructions on data stored in the array.
4 more elements
A method comprising:
- generating, via an application specific integrated circuitry (ASIC), a first plurality of control flow instructions, a second plurality of control flow instructions, and a third plurality of control flow instructions;
- and
- executing, via execution units of a plurality of memory devices, the first plurality of control flow instructions, the second plurality of control flow instructions, and the third plurality of control flow instructions on data stored in memory arrays corresponding to the plurality of memory devices, wherein controllers of the memory devices control the execution units to control an execution of the first plurality of control flow instructions, the second plurality of control flow instructions, and the third plurality of control flow instructions.
An apparatus comprising:
- a memory buffer, configured to generate a first control flow, a second control flow, and a third control flow;
- and
- a plurality of memory devices, each of the plurality of memory devices including:
- a memory array;
- sensing circuitry;
- and
- a controller configured to operate the sensing circuitry to concurrently execute control flow instructions corresponding to first control flow, control flow instructions corresponding to the second control flow, and control flow instructions corresponding to the third control flow on data stored in the memory array.
4 more elements
Dependencies are inferred from the claim text.