Data erasing method, memory control circuit unit and memory storage device
AssigneePhison Electronics Corp.
InventorChih-Kang Yeh
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Abstract
A data erasing method, a memory control circuit unit and a memory storage device are provided. The method includes selecting a first physical erasing unit group from a plurality of physical erasing unit groups, and performing an erase operation to the first physical erasing unit group, wherein the first physical erasing unit group includes a plurality of first physical erasing units, and the number of at least one second physical erasing unit used to perform the erasing operation at the same time point of the plurality of first physical erasing units is different from the number of the plurality of first physical erasing units.
Claims30
A data erasing method, applied to a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical erasing unit groups, each of the plurality of physical erasing unit groups is provided with a plurality of physical erasing units, and the data erasing method comprises:
- selecting a first physical erasing unit group from the plurality of physical erasing unit groups;
- and
- performing an erase operation for the first physical erasing unit group, wherein the first physical erasing unit group comprises a plurality of first physical erasing units, and the number of at least one second physical erasing unit used to perform the erase operation at the same time point of the plurality of first physical erasing units is different from the number of the plurality of first physical erasing units.
A memory control circuit unit, configured to control a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical erasing unit groups, each of the plurality of physical erasing unit groups is provided with a plurality of physical erasing units, and the memory control circuit unit comprises:
- a host interface, configured to be coupled to a host system;
- a memory interface, configured to be coupled to the rewritable non-volatile memory module;
- and
- a memory management circuit, coupled to the host interface and the memory interface,
- wherein the memory management circuit is configured to select a first physical erasing unit group from the plurality of physical erasing unit groups,
- wherein the memory management circuit is further configured to perform an erase operation for the first physical erasing unit group, wherein the first physical erasing unit group comprises a plurality of first physical erasing units, and the number of at least one second physical erasing unit used to perform the erase operation at the same time point of the plurality of first physical erasing units is different from the number of the plurality of first physical erasing units.
A memory storage device, comprising:
- a connecting interface unit, configured to be coupled to a host system;
- a rewritable non-volatile memory module, comprising a plurality of physical erasing unit groups, wherein each of the plurality of physical erasing unit groups is provided with a plurality of physical erasing units;
- and
- a memory control circuit unit, coupled to the connecting interface unit and the rewritable non-volatile memory module,
- wherein the memory control circuit unit is configured to select a first physical erasing unit group from the plurality of physical erasing unit groups,
- wherein the memory control circuit unit is further configured to perform an erase operation for the first physical erasing unit group, wherein the first physical erasing unit group comprises a plurality of first physical erasing units, and the number of at least one second physical erasing unit used to perform the erase operation at the same time point of the plurality of first physical erasing units is different from the number of the plurality of first physical erasing units.
Dependencies are inferred from the claim text.