# US 2020/0404207 A1 · Pixel array and image sensor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2020/0404207 A1 - Document ID: US20200404207A1 - Status: Published application - Kind: A1 - Application number: 16/801,288 - Filed: 2020-02-26 - Published: 2020-12-24 - Earliest claimed: 2019-06-18 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: MYUNGLAE CHU; MINWOONG SEO; JUNGCHAK AHN; TAEYON LEE - Web page: https://patentgrep.com/patent/US20200404207A1 ## CPC - H04N 25/59: by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance - H04N 25/76: Addressed sensors, e.g. MOS or CMOS sensors - H04N 25/766: comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power - H04N 25/772: comprising A/D, V/T, V/F, I/T or I/F converters - H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION ## Abstract A pixel array includes a plurality of pixels. Each of the pixels includes a photoelectric element formed on a substrate and that generates charge from light, and a pixel circuit formed between the photoelectric element and the substrate and that outputs a digital signal value based on an amount of the generated charge. The pixel circuit includes a floating diffusion formed in the substrate and that stores the charge therein, a vertical pixel electrode that connects the floating diffusion to the photoelectric element and extends in a direction perpendicular to the substrate, an analog-to-digital converter that converts an electric potential of the floating diffusion into the digital signal value, and a memory element that stores the digital signal value. ## Claims ### Claim 1 A pixel array comprising a plurality of pixels, wherein each of the plurality of pixels comprises: a photoelectric element formed on a substrate and configured to generate charge from light; and a pixel circuit formed between the photoelectric element and the substrate, and configured to output a digital signal value based on an amount of the generated charge, wherein the pixel circuit comprises a floating diffusion formed in the substrate and configured to store the charge therein, a vertical pixel electrode configured to connect the floating diffusion to the photoelectric element, the vertical pixel electrode extending in a direction perpendicular to the substrate, an analog-to-digital converter configured to convert an electric potential of the floating diffusion into the digital signal value, and a memory element configured to store the digital signal value. ### Claim 2 (depends on 1) The pixel array of claim 1, wherein the photoelectric element is any one of a quantum dot photodiode, an organic photoconductive film, and a perovskite photodiode, and does not include silicon material. ### Claim 3 (depends on 1) The pixel array of claim 1, wherein the vertical pixel electrode comprises a metal material. ### Claim 4 (depends on 1) The pixel array of claim 1, wherein the memory element is located at a same level as at least a portion of the vertical pixel electrode. ### Claim 5 (depends on 1) The pixel array of claim 1, wherein the pixel circuit further comprises a reset transistor including the floating diffusion as one electrode, the reset transistor being configured to provide a reset potential to the floating diffusion during a reset operation, wherein the memory element is formed at a same level as the reset transistor. ### Claim 6 (depends on 1) The pixel array of claim 1, wherein the pixel circuit further comprises a reset transistor including the floating diffusion as one electrode, the reset transistor being configured to provide a reset potential to the floating diffusion during a reset operation, wherein the analog-to-digital converter converts the reset potential into a digital reset value during the reset operation. ### Claim 7 (depends on 6) The pixel array of claim 6, wherein the memory element is configured to store a value corresponding to the digital reset value during the reset operation. ### Claim 8 An image sensor comprising a pixel array including pixels arranged in a matrix form in a plurality of row lines and a plurality of column lines, wherein each of the pixels comprises: a photoelectric element configured to generate charge in proportion to intensity of incident light; and a pixel circuit, the pixel circuit comprising a floating diffusion formed in a substrate, shorted with the photoelectric element, and configured to store the charge therein, a reset transistor configured to provide a reset potential to the floating diffusion during a reset operation, an analog-to-digital converter configured to generate a digital reset value based on the reset potential during the reset operation, and a memory element configured to store the digital reset value during the reset operation. ### Claim 9 (depends on 8) The image sensor of claim 8, wherein a transistor is not located between the floating diffusion and the photoelectric element. ### Claim 10 (depends on 8) The image sensor of claim 8, wherein the floating diffusion is connected to the photoelectric element by a conductive interconnection comprising a metal material. ### Claim 11 (depends on 8) The image sensor of claim 8, wherein the pixel circuit further comprises a driver transistor configured to generate a signal potential according to an electric potential of the floating diffusion, and wherein the analog-to-digital converter is configured to convert the signal potential into a digital signal value during a sampling operation. ### Claim 12 (depends on 11) The image sensor of claim 11, wherein the memory element is configured to store the digital signal value during the sampling operation. ### Claim 13 (depends on 12) The image sensor of claim 12, further comprising: a row driver configured to drive all the row lines during each of a first frame period and a second frame period that is subsequent to the first frame period; and a readout circuit configured to read the digital reset value and the digital signal value from the memory element. ### Claim 14 (depends on 13) The image sensor of claim 13, wherein the pixels comprise a first pixel, and wherein the readout circuit is configured to compare a digital reset value of the first frame period of the first pixel with a digital signal value of the second frame period of the first pixel. ### Claim 15 (depends on 8) The image sensor of claim 8, wherein the photoelectric element is any one of a quantum dot photodiode, an organic photoconductive film, and a perovskite photodiode, and does not include silicon material. ### Claim 16 (depends on 8) The image sensor of claim 8, wherein the memory element is any one of a dynamic random access memory (DRAM), a static RAM (SRAM), a phase-change RAM (PRAM), a spin transfer torque-magnetic RAM (STT-MRAM), and a resistive RAM (ReRAM). ### Claim 17 An image sensor comprising: a pixel array comprising pixels arranged in a matrix form in a plurality of row lines and a plurality of column lines; a sensor circuit configured to drive the pixel array; and an image processor configured to control the sensor circuit and generate an image, wherein each of the pixels comprises a photoelectric element configured to generate charge in proportion to intensity of incident light, and a pixel circuit, wherein the pixel circuit comprises a floating diffusion formed in a substrate and configured to store the charge generated by the photoelectric element therein, a vertical pixel electrode configured to connect the photoelectric element to the floating diffusion, a reset transistor configured to provide a reset potential to the floating diffusion during a reset operation, a driver transistor configured to generate a signal potential according to an electric potential of the floating diffusion, an analog-to-digital converter configured to convert the signal potential into a digital signal value during a sampling operation and generate a digital reset value based on the reset potential during the reset operation, and a memory element configured to store the digital signal value during the sampling operation and store the digital reset value during the reset operation. ### Claim 18 (depends on 17) The image sensor of claim 17, further comprising: a row driver configured to drive all the row lines during each of a first frame period and a second frame period that is subsequent to the first frame period; and a readout circuit configured to read the digital reset value and the digital signal value from the memory element. ### Claim 19 (depends on 18) The image sensor of claim 18, wherein the pixels comprise a first pixel, and wherein the readout circuit compares a digital reset value of the first frame period of the first pixel with a digital signal value of the second frame period of the first pixel. ### Claim 20 (depends on 17) The image sensor of claim 17, wherein the vertical pixel electrode comprises a metal material.