# US 2020/0403131 A1 · Display device and method of fabricating the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2020/0403131 A1 - Document ID: US20200403131A1 - Status: Published application - Kind: A1 - Application number: 16/891,016 - Filed: 2020-06-02 - Published: 2020-12-24 - Earliest claimed: 2019-06-21 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Kyung Bae Kim; Mee Hye Jung; Chong Chul Chai - Web page: https://patentgrep.com/patent/US20200403131A1 ## CPC - H10H 20/819: characterised by their shape, e.g. curved or truncated substrates - H10H 20/857: Interconnections, e.g. lead-frames, bond wires or solder balls - G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED] - H10H 20/01: Manufacture or treatment - H10H 20/816: having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures - H10H 20/821: of the light-emitting regions, e.g. non-planar junctions - H10W 90/00: Package configurations - G09G 2300/0426: Layout of electrodes and connections - G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays - G09G 2310/0275: Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current - H10H 20/84: Coatings, e.g. passivation layers or antireflective coatings - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A display device includes a substrate and pixels. The substrate includes: a display area including pixel areas, each including a first area and a second area; and a non-display area enclosing at least one side of the display area. The pixels are disposed on the pixel areas, each pixel including light emitting elements. Each pixel further includes: a pixel circuit part disposed on the first area and including at least one transistor and at least one capacitor; and a display element part disposed on the second area and including an emission area to emit light. Each of the pixel circuit part and the display element part has a multi-layer structure including one or more conductive layers and one or more insulating layers. At least one layer of the pixel circuit part and at least one layer of the display element part are disposed in a same layer. ## Claims ### Claim 1 A display device comprising: a substrate comprising: a display area comprising pixel areas, each pixel area among the pixel areas comprising a first area and a second area; and a non-display area enclosing at least one side of the display area; and pixels disposed on the pixel areas, each pixel among the pixels comprising light emitting elements, wherein each pixel among the pixel further comprises: a pixel circuit part disposed on the first area, the pixel circuit part comprising at least one transistor and at least one capacitor; and a display element part disposed on the second area, the display element part comprising an emission area configured to emit light, wherein each of the pixel circuit part and the display element part has a multi-layer structure comprising one or more conductive layers and one or more insulating layers, and wherein at least one layer of the pixel circuit part and at least one layer of the display element part are disposed in a same layer. ### Claim 2 (depends on 1) The display device of claim 1, wherein: the one or more insulating layers included in each of pixel circuit part and the display element part comprise first to fourth insulating layers sequentially stacked on the substrate; and the one or more conductive layers included in each of pixel circuit part and the display element part comprise: a first conductive layer disposed on the first insulating layer; a second conductive layer disposed on the second insulating layer; and a third conductive layer disposed on the third insulating layer. ### Claim 3 (depends on 2) The display device of claim 2, wherein the at least one transistor comprises: an active pattern disposed on the substrate; a gate electrode disposed on the active pattern, the first insulating layer being interposed between the gate electrode and the active pattern; a first terminal coupled to a first end of the active pattern; and a second terminal coupled to a second end of the active pattern, the second end being opposite the first end. ### Claim 4 (depends on 3) The display device of claim 3, wherein: the first conductive layer of the pixel circuit part comprises a scan line configured to transmit a scan signal to the pixel, a lower electrode of the capacitor, and the gate electrode; the second conductive layer of the pixel circuit part comprises an upper electrode overlapping with the lower electrode of the capacitor; and the third conductive layer of the pixel circuit part comprises a data line configured to transmit a data signal to at least one pixel among the pixels. ### Claim 5 (depends on 4) The display device of claim 4, wherein the display element part comprises: a first electrode disposed in the emission area; a second electrode disposed in the emission area and spaced apart from the first electrode; light emitting elements disposed between the first electrode and the second electrode; stacked patterns respectively disposed between the substrate and the first electrode and between the substrate and the second electrode; and a contact electrode disposed on each of the first and the second electrodes. ### Claim 6 (depends on 5) The display device of claim 5, wherein the first and the second electrodes are included in the third conductive layer of the display element part and are disposed in a same layer as the data line. ### Claim 7 (depends on 6) The display device of claim 6, wherein each of the stacked patterns comprises: a first metal pattern disposed on the first insulating layer; the second insulating layer disposed on and covering the first metal pattern; a second metal pattern disposed on the second insulating layer and overlapping with the first metal pattern; and the third insulating layer disposed on and covering the second metal pattern. ### Claim 8 (depends on 7) The display device of claim 7, wherein: each of the stacked patterns comprises a structure in which the first metal pattern, the second insulating layer, the second metal pattern, and the third insulating layer are sequentially stacked; the first metal pattern is included in the first conductive layer of the display element part; and the second metal pattern is included in the second conductive layer of the display element part. ### Claim 9 (depends on 8) The display device of claim 8, wherein: the first metal pattern is provided in a same layer as the lower electrode of the capacitor, the scan line, and the gate electrode; and the second metal pattern is provided in a same layer as the upper electrode of the capacitor. ### Claim 10 (depends on 6) The display device of claim 6, wherein: each of the stacked patterns comprises: a first auxiliary pattern disposed on the substrate; the first insulating layer disposed on and covering the first auxiliary pattern; a first metal pattern disposed on the first insulating layer; the second insulating layer disposed on the first metal pattern and covering the first metal pattern; a second metal pattern disposed on the second insulating layer; and the third insulating layer disposed on and covering the second metal pattern; and the first auxiliary pattern is disposed in a same layer as the active pattern. ### Claim 11 (depends on 10) The display device of claim 10, wherein each of the stacked patterns comprises a structure in which the first auxiliary pattern, the first insulating layer, the first metal pattern, the second insulating layer, the second metal pattern, and the third insulating layer are sequentially stacked. ### Claim 12 (depends on 6) The display device of claim 6, wherein: in the pixel circuit part, the fourth insulating layer is disposed on and covers the data line; and in the display element part, the fourth insulating layer covers a side of each of the first and second electrodes. ### Claim 13 (depends on 12) The display device of claim 12, wherein each of the light emitting elements is disposed on the fourth insulating layer between the first electrode and the second electrode. ### Claim 14 (depends on 13) The display device of claim 13, wherein: the display element part further comprises a fourth conductive layer disposed on the third conductive layer; and the fourth conductive layer comprises the contact electrode. ### Claim 15 (depends on 14) The display device of claim 14, wherein: the display element part further comprises a bank disposed around the emission area; and the bank comprises a multi-layer structure comprising two or more conductive layers and two or more insulating layers. ### Claim 16 (depends on 15) The display device of claim 15, wherein: the bank comprises a first bank area and a second bank area that have different stack structures; the first bank area comprises: a third metal pattern disposed on the first insulating layer; the second insulating layer disposed on and covering the third metal pattern; a fourth metal pattern disposed on the second insulating layer; the third insulating layer disposed on and covering the fourth metal pattern; and the fourth insulating layer disposed on the third insulating layer; and the second bank area comprises: the third metal pattern; the second insulating layer; the fourth metal pattern; the third insulating layer; is the third conductive layer disposed on the third insulating layer; and the fourth insulating layer disposed on the third conductive layer. ### Claim 17 (depends on 16) The display device of claim 16, wherein: the third metal pattern is disposed in a same layer as the first metal pattern; and the fourth metal pattern is disposed in a same layer as the second metal pattern. ### Claim 18 (depends on 15) The display device of claim 15, wherein: the bank comprises a first bank area and a second bank area that have different stack structures; the first bank area comprises: a second auxiliary pattern disposed on the substrate; the first insulating layer disposed on and covering the second auxiliary pattern; a third metal pattern disposed on the first insulating layer; the second insulating layer disposed on and covering the third metal pattern; a fourth metal pattern disposed on the second insulating layer; the third insulating layer disposed on and covering the fourth metal pattern; and the fourth insulating layer disposed on the third insulating layer; and the second bank area comprises: the second auxiliary pattern; the first insulating layer; the third metal pattern; the second insulating layer; the fourth metal pattern; the third insulating layer; the third conductive layer disposed on the third insulating layer; and the fourth insulating layer disposed on the third conductive layer. ### Claim 19 (depends on 18) The display device of claim 18, wherein: the second auxiliary pattern is disposed in a same layer as the active pattern, the third metal pattern is disposed in a same layer as the first metal pattern; and the fourth metal pattern is disposed in a same layer as the second metal pattern. ### Claim 20 A method of manufacturing a display device, the method comprising: forming a pixel comprising a pixel area, the pixel area comprising first and second areas, wherein forming the pixel comprises: forming, in the first area, a pixel circuit part comprising at least one transistor and at least one capacitor; and forming, in the second area, a display element part comprising light emitting elements, wherein each of the pixel circuit part and the display element part has a multi-layer structure comprising one or more conductive layers and one or more insulating layers, and wherein at least one layer of the pixel circuit part and at least one layer of the display element part are formed through a same process.