# US 2020/0403000 A1 · Semiconductor device and method of manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2020/0403000 A1 - Document ID: US20200403000A1 - Status: Published application - Kind: A1 - Application number: 17/011,451 - Filed: 2020-09-03 - Published: 2020-12-24 - Earliest claimed: 2016-09-21 - Assignees: Toshiba Memory Corporation - Applicants: Toshiba Memory Corporation - Inventors: Kaito SHIRAI; Hideto Takekida; Tatsuo Izumi; Reiko Shamoto; Takahisa Kanemura; Shigeo Kondo - Web page: https://patentgrep.com/patent/US20200403000A1 ## CPC - H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels - H10B 43/10: characterised by the top-view layout - H10B 43/35: with cell select transistors, e.g. NAND - H10D 64/037: {comprising charge-trapping insulators} - H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)} - H10B: ELECTRONIC MEMORY DEVICES - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract According to one embodiment, the stacked body includes a first stacked portion including a plurality of electrode layers, a second stacked portion including a plurality of electrode layers, and being disposed separately from the first stacked portion in the first direction, and a connection portion including a high dielectric layer provided between the first stacked portion and the second stacked portion and having a dielectric constant higher than a dielectric constant of the insulator. The column-shaped portion includes a first portion provided in the first stacked portion and extending in the first direction of the stacked body, a second portion provided in the second stacked portion and extending in the first direction, and an intermediate portion provided in the connection portion and connected the first portion to the second portion. ## Claims ### Claim 1 (canceled) ### Claim 2 A semiconductor device comprising: a stacked body including: a first stacked portion including a plurality of first electrode layers stacked in a first direction via a first insulator, a second stacked portion including a plurality of second electrode layers stacked in the first direction via a second insulator and being disposed separately from the first stacked portion in the first direction, and a connection portion including a high dielectric layer provided between the first stacked portion and the second stacked portion, and having a dielectric constant higher than a dielectric constant of the first and second insulators; a first semiconductor layer extending in the first stacked portion in the first direction; a first charge storage portion provided between the first semiconductor layer and one of the plurality of first electrode layers; a second semiconductor layer extending in the second stacked portion in the first direction; a second charge storage portion provided between the second semiconductor layer and one of the plurality of second electrode layers; and a third semiconductor layer extending in the connection portion and being in contact with the first semiconductor layer and the second semiconductor layer, the first, second, and third semiconductor layers respectively having a circular outer peripheral shape in a plane perpendicular to the first direction, a maximum diameter of the third semiconductor layer being larger than a diameter of a lower end of the second semiconductor layer. ### Claim 3 (depends on 2) The device according to claim 2, wherein the third semiconductor layer includes a corner portion surrounded by the connection portion. ### Claim 4 (depends on 2) The device according to claim 2, wherein the high dielectric layer is provided in the entire connection portion. ### Claim 5 A semiconductor device comprising: a stacked body including: a first stacked portion including a plurality of first electrode layers stacked in a. first direction via a first insulator, a second stacked portion including a plurality of second electrode layers stacked in the first direction via a second insulator and being disposed separately from the first stacked portion in the first direction, and a connection portion including a high dielectric layer provided between the first stacked portion and the second stacked portion, and having a dielectric constant higher than a dielectric constant of the first and second insulators; and a column-shaped portion including: a first portion provided in the first stacked portion and extending in the first direction, a second portion provided in the second stacked portion and extending in the first direction, and an intermediate portion provided in the connection portion and connected the first portion to the second portion; the high dielectric layer including at least one selected from the group consisting of: a hafnium oxide, an aluminum oxide, a silicon carbonitride, a zirconium oxide. ### Claim 6 (depends on 5) The device according to claim 5, wherein the column-shaped portion includes: a semiconductor layer extending in the first direction; and a charge storage portion provided between the semiconductor layer and the first stacked portion, and between the semiconductor layer and the second stacked portion. ### Claim 7 (depends on 6) The device according to claim 6, wherein the semiconductor layer includes a corner portion surrounded by the connection portion. ### Claim 8 (depends on 5) The device according to claim 5, wherein the high dielectric layer is provided in the entire connection portion. ### Claim 9 A semiconductor device comprising: a stacked body including: a first stacked portion including a plurality of first electrode layers stacked in a first direction via a first insulator, a second stacked portion including a plurality of second electrode layers stacked in the first direction via a second insulator and being disposed separately from the first stacked portion in the first direction, and a connection portion including a high dielectric layer provided between the first stacked portion and the second stacked portion, and having a dielectric constant higher than a dielectric constant of the first and second insulators; and a column-shaped portion including: a first portion provided in the first stacked portion and extending in the first direction, a second portion provided in the second stacked portion and extending in the first direction, and an intermediate portion provided in the connection portion and connected the first portion to the second portion; a thickness of the high dielectric layer being greater than a thickness of the first insulator and a thickness of the second insulator in the first direction. ### Claim 10 (depends on 9) The device according to claim 9, wherein the column-shaped portion includes: a semiconductor layer extending in the first direction; and a charge storage portion provided between the semiconductor layer and the first stacked portion, and between the semiconductor layer and the second stacked portion. ### Claim 11 (depends on 10) The device according to claim 10, wherein the semiconductor layer includes a corner portion surrounded by the connection portion. ### Claim 12 (depends on 9) The device according to claim 9, wherein the high dielectric layer is provided in the entire connection portion. ### Claim 13 A semiconductor device comprising: a stacked body including: a first electrode layer, a first insulator provided on the first electrode layer, a connection portion provided on the first insulator, the connection portion including a high dielectric layer having a dielectric constant higher than a dielectric constant of the first insulator, and a second electrode layer provided above the connection portion; first and second semiconductor layers provided adjacent to each other in the stacked body, and extending in a first direction through the first electrode layer, the first insulator, the connection portion, and the second electrode layer; a first charge storage portion provided between the first semiconductor layer and the first electrode layer; a second charge storage portion provided between the first semiconductor layer and the second electrode layer; a third charge storage portion provided between the second semiconductor layer and the first electrode layer; and a fourth charge storage portion provided between the second semiconductor layer and the second electrode layer, a shortest distance between the first and second semiconductor layers in a portion surrounded by the connection portion being shorter than a shortest distance between the first and second semiconductor layers in a portion surrounded by the first insulator. ### Claim 14 (depends on 13) The device according to claim 13, wherein the high dielectric layer is provided in the entire connection portion. ### Claim 15 (depends on 13) The device according to claim 13, wherein the connection portion includes: the high dielectric layer, a first insulating layer between the first electrode layer and the high dielectric layer, and a second insulating layer between the high dielectric layer and the second electrode layer. ### Claim 16 (depends on 15) The device according to claim 15, wherein a thickness of the high dielectric layer is thinner than a thickness of the first insulator and a thickness of the second insulator. ### Claim 17 (depends on 13) The device according to claim 13, wherein the high dielectric layer includes a hafnium oxide. ### Claim 18 (depends on 13) The device according to claim 13, wherein the first semiconductor layer includes a corner portion surrounded by the connection portion, and the second semiconductor layer includes a corner portion surrounded by the connection portion.