# US 2020/0402995 A1 · Three-dimensional flash memory device including channel structures having enlarged portions > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2020/0402995 A1 - Document ID: US20200402995A1 - Status: Published application - Kind: A1 - Application number: 16/589,206 - Filed: 2019-10-01 - Published: 2020-12-24 - Earliest claimed: 2019-06-20 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Jisung CHEON - Web page: https://patentgrep.com/patent/US20200402995A1 ## CPC - H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels - H10B 43/50: characterised by the boundary region between the core and peripheral circuit regions - H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels - H10W 20/42: Vias, e.g. via plugs - H10W 20/435: {Cross-sectional shapes or dispositions of interconnections} - H10B: ELECTRONIC MEMORY DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A three-dimensional flash memory device including a lower and upper word line stack; a cell channel structure; and a dummy channel structure, wherein the cell channel structure includes a lower cell channel structure; an upper cell channel structure; and a cell channel enlarged portion between the lower and upper cell channel structures and having a width greater than that of the lower cell channel structure, wherein the dummy channel structure includes a lower dummy channel structure; an upper dummy channel structure; and a dummy channel enlarged portion between the lower and upper dummy channel structures, the dummy channel enlarged portion having a width greater than that of the lower dummy channel structure, wherein a difference between the width of the dummy channel enlarged portion and the lower dummy channel structure is greater than a difference between the width of the cell channel enlarged portion and the lower cell channel structure. ## Claims ### Claim 1 A three-dimensional flash memory device having a cell area and an extension area, the device comprising: a substrate; a lower word line stack and an upper word line stack on the substrate; an interlayer dielectric layer between the lower word line stack and the upper word line stack; a cell channel structure in the cell area; and a dummy channel structure in the extension area, wherein the cell channel structure includes: a lower cell channel structure penetrating the lower word line stack and connected to the substrate; an upper cell channel structure penetrating the upper word line stack; and a cell channel enlarged portion between the lower cell channel structure and the upper cell channel structure, the cell channel enlarged portion having a horizontal width that is greater than a horizontal width of the lower cell channel structure, wherein the dummy channel structure includes: a lower dummy channel structure penetrating the lower word line stack and connected to the substrate; an upper dummy channel structure penetrating the upper word line stack; and a dummy channel enlarged portion between the lower dummy channel structure and the upper dummy channel structure, the dummy channel enlarged portion having a horizontal width that is greater than a horizontal width of the lower dummy channel structure, wherein a difference between the horizontal width of the dummy channel enlarged portion and the horizontal width of the lower dummy channel structure is greater than a difference between the horizontal width of the cell channel enlarged portion and the horizontal width of the lower cell channel structure. ### Claim 2 (depends on 1) The three-dimensional flash memory device as claimed in claim 1, wherein the horizontal width of the lower dummy channel structure is greater than the horizontal width of the lower cell channel structure. ### Claim 3 (depends on 1) The three-dimensional flash memory device as claimed in claim 1, wherein the horizontal width of the dummy channel enlarged portion is greater than the horizontal width of the cell channel enlarged portion. ### Claim 4 (depends on 1) The three-dimensional flash memory device as claimed in claim 1, wherein a vertical thickness of the dummy channel enlarged portion is greater than a vertical thickness of the cell channel enlarged portion. ### Claim 5 (depends on 1) The three-dimensional flash memory device as claimed in claim 1, wherein a bottom surface of the dummy channel enlarged portion is at a lower level than a bottom surface of the cell channel enlarged portion. ### Claim 6 (depends on 1) The three-dimensional flash memory device as claimed in claim 1, further comprising: a lower interlayer dielectric layer covering the lower word line stack; a middle interlayer dielectric layer on the lower interlayer dielectric layer; and an upper interlayer dielectric layer on the middle interlayer dielectric layer, wherein: the lower cell channel structure and the lower dummy channel structure vertically penetrate the lower interlayer dielectric layer, the upper cell channel structure and the upper dummy channel structure vertically penetrate the upper interlayer dielectric layer, the middle interlayer dielectric layer surrounds side surfaces of the cell channel enlarged portion and side surfaces of the dummy channel enlarged portion, a bottom surface of the dummy channel enlarged portion is at a lower level than a bottom surface of the middle interlayer dielectric layer. ### Claim 7 (depends on 6) The three-dimensional flash memory device as claimed in claim 6, wherein a bottom surface of the cell channel enlarged portion is at a lower level than a bottom surface of the middle interlayer dielectric layer. ### Claim 8 (depends on 6) The three-dimensional flash memory device as claimed in claim 6, wherein a bottom surface of the cell channel enlarged portion is at a lower level than the bottom surface of the middle interlayer dielectric layer. ### Claim 9 (depends on 8) The three-dimensional flash memory device as claimed in claim 8, wherein the bottom surface of the dummy channel enlarged portion is at a lower level than the bottom surface of the cell channel enlarged portion. ### Claim 10 (depends on 6) The three-dimensional flash memory device as claimed in claim 6, wherein an upper surface of the middle interlayer dielectric layer in the extension area is at a lower level than an upper surface of the middle interlayer dielectric layer in the cell area. ### Claim 11 (depends on 1) The three-dimensional flash memory device as claimed in claim 1, wherein side surfaces of the cell channel enlarged portion and side surfaces of the dummy channel enlarged portion are rounded. ### Claim 12 (depends on 11) The three-dimensional flash memory device as claimed in claim 11, further comprising: a lower interlayer dielectric layer covering the lower word line stack; a middle interlayer dielectric layer on the lower interlayer dielectric layer; and an upper interlayer dielectric layer on the middle interlayer dielectric layer, wherein: the lower cell channel structure and the lower dummy channel structure vertically penetrate the lower interlayer dielectric layer, the upper cell channel structure and the upper dummy channel structure vertically penetrate the upper interlayer dielectric layer, and the middle interlayer dielectric layer surrounds side surfaces of the cell channel enlarged portion and the side surface of the dummy channel enlarged portion, the cell channel enlarged portion further includes an additional enlarged portion in the lower interlayer dielectric layer, and the dummy channel enlarged portion further includes an additional enlarged portion in the lower interlayer dielectric layer. ### Claim 13 (depends on 12) The three-dimensional flash memory device as claimed in claim 12, wherein a vertical thickness of the additional enlarged portion of the dummy channel extension is greater than a vertical thickness of the additional enlarged portion of the cell channel extension. ### Claim 14 (depends on 12) The three-dimensional flash memory device as claimed in claim 12, wherein: a radius of curvature of an outer surface of the additional enlarged portion of the cell channel enlarged portion is greater than a radius of curvature of the cell channel enlarged portion, and a radius of curvature of an outer surface of the additional enlarged portion of the dummy channel enlarged is greater than a radius of curvature of the dummy channel enlarged portion. ### Claim 15 A three-dimensional flash memory device having a cell area and an extension area, the device comprising: a substrate; a lower word line stack and an upper word line stack on the substrate; an interlayer dielectric layer between the lower word line stack and the upper word line stack; a cell channel structure in the cell area; and a dummy channel structure in the extension area, wherein the cell channel structure includes: a lower cell channel structure penetrating the lower word line stack and connected to the substrate; an upper cell channel structure penetrating the upper word line stack; and a cell channel enlarged portion between the lower cell channel structure and the upper cell channel structure, wherein the dummy channel structure includes: a lower dummy channel structure penetrating the lower word line stack and connected to the substrate; an upper dummy channel structure penetrating the upper word line stack; and a dummy channel enlarged portion between the lower dummy channel structure and the upper dummy channel structure, wherein a bottom surface of the dummy channel enlarged portion is at a lower level than a bottom surface of the interlayer dielectric layer. ### Claim 16 (depends on 15) The three-dimensional flash memory device as claimed in claim 15, wherein side surfaces of the cell channel enlarged portion and side surfaces of the dummy channel enlarged portion are rounded. ### Claim 17 (depends on 15) The three-dimensional flash memory device as claimed in claim 15, further comprising a vertical contact structure on the extension area, wherein: the lower word line stack includes a plurality of lower word lines, the upper word line stack includes a plurality of upper word lines, and the vertical contact structure is connected to one lower word line of the lower word line stack or one upper word line of the upper word line stack. ### Claim 18 (depends on 15) The three-dimensional flash memory device as claimed in claim 15, wherein a difference between a horizontal width of the dummy channel enlarged portion and a horizontal width of the lower dummy channel structure is greater than a difference between a horizontal width of the cell channel enlarged portion and a horizontal width of the lower cell channel structure. ### Claim 19 A three-dimensional flash memory device having a cell area and an extension area, the device comprising: a substrate; a lower word line stack on the substrate and including a plurality of stacked lower word lines, an upper word line stack on the substrate and including a plurality of stacked upper word lines; an interlayer dielectric layer between the lower word line stack and the upper word line stack; a cell channel structure in the cell area; and a dummy channel structure and a vertical contact structure in the extension area, wherein: the cell channel structure includes: a lower cell channel structure penetrating the lower word line stack and connected to the substrate; an upper cell channel structure penetrating the upper word line stack; and a cell channel enlarged portion between the lower cell channel structure and the upper cell channel structure, the dummy channel structure includes: a lower dummy channel structure penetrating the lower word line stack and connected to the substrate; an upper dummy channel structure penetrating the upper word line stack; and a dummy channel enlarged portion between the lower dummy channel structure and the upper dummy channel structure, the vertical contact structure is connected to one lower word line of the lower word line stack or one upper word line of the upper word line stack, a horizontal width of the lower dummy channel structure is greater than a horizontal width of the lower cell channel structure, a horizontal width of the dummy channel enlarged portion is greater than a horizontal width of the cell channel enlarged portion, a bottom surface of the dummy channel enlarged portion is at a lower level than a bottom surface of the interlayer dielectric layer, and side surfaces of the dummy channel enlarged portion and side surfaces of the cell channel enlarged portion are rounded. ### Claim 20 (depends on 19) The three-dimensional flash memory device as claimed in claim 19, wherein a difference between the horizontal width of the dummy channel enlarged portion and the horizontal width of the lower dummy channel structure is greater than a difference between the horizontal width of the cell channel enlarged portion and the horizontal width of the lower cell channel structure.