# US 2020/0402883 A1 · Semiconductor packages having heat spreader

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2020/0402883 A1
- Document ID: US20200402883A1
- Status: Published application
- Kind: A1
- Application number: 16/701,903
- Filed: 2019-12-03
- Published: 2020-12-24
- Earliest claimed: 2019-06-18
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Younglyong Kim; Aenee Jang
- Web page: https://patentgrep.com/patent/US20200402883A1

## CPC

- H10W 40/22: characterised by their shape, e.g. having conical or cylindrical projections
- H10W 40/70: Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
- H10W 40/778: {in encapsulations}
- H10W 74/111: {the semiconductor body being completely enclosed}
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 90/00: Package configurations
- H10W 72/0198: {batch processes}
- H10W 72/072: {of bump connectors}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07354: {changes in dispositions}
- H10W 72/075: {of bond wires}
- H10W 72/07554: {changes in dispositions}
- H10W 72/251: {Materials}
- H10W 72/325: {Die-attach connectors having a filler embedded in a matrix}
- H10W 72/347: {Dispositions of multiple die-attach connectors}
- H10W 72/353: {not comprising solid metals or solid metalloids, e.g. ceramics}
- H10W 72/354: {comprising polymers}
- H10W 72/865: {Die-attach connectors and bond wires}
- H10W 72/877: {Bump connectors and die-attach connectors}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 74/10: characterised by their shape or disposition
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/24: at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
- H10W 90/271: {the chips having passive surfaces facing each other, i.e. in a back-to-back arrangement}
- H10W 90/288: {characterised by arrangements for thermal management of the stacked chips}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/732: {between stacked chips}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor package includes a lower semiconductor chip disposed on a substrate, at least one upper semiconductor chip disposed on the lower semiconductor chip, a heat spreader bonded on the lower semiconductor chip and the at least one upper semiconductor chip, and an encapsulant surrounding side surfaces of the heat spreader. A lower surface of the heat spreader includes a first protrusion and a non-protruding portion, the first protrusion is in contact with an upper surface of the lower semiconductor chip, and the non-protruding portion is in contact with an upper surface of the at least one upper semiconductor chip.

## Claims

### Claim 1

A semiconductor package comprising:
a lower semiconductor chip on a substrate;
at least one upper semiconductor chip on the lower semiconductor chip;
a heat spreader bonded on the lower semiconductor chip and the at least one upper semiconductor chip, the heat spreader including a first protrusion and a non-protruding portion on a lower surface thereof, the first protrusion being in contact with an upper surface of the lower semiconductor chip and the non-protruding portion being in contact with an upper surface of the at least one upper semiconductor chip; and
an encapsulant surrounding at least the substrate, the lower semiconductor chip, the at least one upper semiconductor chip, and side surfaces of the heat spreader.

### Claim 2 (depends on 1)

The semiconductor package of claim 1, further comprising:
heat transfer materials between the lower semiconductor chip and the heat spreader and between the at least one upper semiconductor chip and the heat spreader.

### Claim 3 (depends on 1)

The semiconductor package according to claim 1, wherein the encapsulant is configured to partially cover an upper surface of the heat spreader.

### Claim 4 (depends on 1)

The semiconductor package according to claim 1, wherein an upper surface of the heat spreader further includes a recessed portion.

### Claim 5 (depends on 1)

The semiconductor package of claim 1, wherein the first protrusion is adjacent to the non-protruding portion such that side surfaces of the first protrusion connected to the non-protruding portion are rounded.

### Claim 6 (depends on 1)

The semiconductor package according to claim 1, wherein the first protrusion and the at least one upper semiconductor chip are spaced apart by at least 100 μm in a horizontal direction.

### Claim 7 (depends on 1)

The semiconductor package of claim 1, wherein the lower semiconductor chip is flip-chip bonded to the substrate.

### Claim 8 (depends on 1)

The semiconductor package according to claim 1, further comprising:
an anti-oxidation film on at least the lower surface of the heat spreader.

### Claim 9 (depends on 1)

The semiconductor package according to claim 1, wherein an upper surface of the encapsulant adjacent to the heat spreader includes a groove.

### Claim 10 (depends on 9)

The semiconductor package according to claim 9, wherein a depth of the groove is 2 μm to 15 μm.

### Claim 11 (depends on 1)

The semiconductor package according to claim 1, wherein
the first protrusion and the non-protruding portion are spaced apart in a first horizontal direction, and
the heat spreader extends in a second horizontal direction crossing the first horizontal direction.

### Claim 12 (depends on 11)

The semiconductor package of claim 11, wherein, in the second horizontal direction, each of the side surfaces of the heat spreader are vertically aligned with side surfaces of the encapsulant.

### Claim 13 (depends on 11)

The semiconductor package of claim 11, wherein the heat spreader further includes a second protrusion in contact with an upper surface of the substrate, the second protrusion protruding more than the first protrusion in a vertical direction.

### Claim 14

A semiconductor package comprising:
a first lower semiconductor chip and a second lower semiconductor chip in parallel on a substrate;
at least one first upper semiconductor chip on the first lower semiconductor chip;
at least one second upper semiconductor chip on the second lower semiconductor chip;
a first heat spreader bonded on the first lower semiconductor chip and the at least one first upper semiconductor chip, the first heat spreader including a protrusion and a non-protruding portion on a lower surface thereof such that the protrusion is in contact with the first lower semiconductor chip and the non-protruding portion is in contact with the at least one first upper semiconductor chip; and
a encapsulant surrounding at least the substrate, the first lower semiconductor chip, the second lower semiconductor chip, the at least one first upper semiconductor chip, the at least one second upper semiconductor chip, and side surfaces of the first heat spreader.

### Claim 15 (depends on 14)

The semiconductor package of claim 14, further comprising:
a second heat spreader in contact with the second lower semiconductor chip and the at least one second upper semiconductor chip.

### Claim 16 (depends on 14)

The semiconductor package of claim 14, wherein the first heat spreader is in contact with the second lower semiconductor chip and the at least one second upper semiconductor chip.

### Claim 17 (depends on 14)

The semiconductor package of claim 14, wherein the first heat spreader further includes a intermediate non-protruding portion between the first lower semiconductor chip and the second lower semiconductor chip.

### Claim 18 (depends on 14)

The semiconductor package according to claim 14, wherein an upper surface of the first heat spreader is partially covered with the encapsulant.

### Claim 19

A semiconductor package comprising:
a lower semiconductor chip on a substrate;
at least one upper semiconductor chip on the lower semiconductor chip;
a heat spreader bonded on the lower semiconductor chip and the at least one upper semiconductor chip, the heat spreader including a protrusion and a non-protruding portion on a lower surface thereof such that the non-protruding portion is in contact with an upper surface of the at least one upper semiconductor chip;
heat transfer materials connecting the lower semiconductor chip and the at least one upper semiconductor chip to the heat spreader; and
a encapsulant surrounding the substrate, the lower semiconductor chip, the at least one upper semiconductor chip, and side surfaces of the heat spreader such that an upper surface of the heat spreader is partially exposed.

### Claim 20 (depends on 19)

The semiconductor package of claim 19, wherein the protrusion is adjacent to the non-protruding portion such that side surfaces of the protrusion connected to the non-protruding portion are rounded.