# US 2020/0401923 A1 · System and method for latency-aware mapping of quantum circuits to quantum chips

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- Number: US 2020/0401923 A1
- Document ID: US20200401923A1
- Status: Published application
- Kind: A1
- Application number: 16/446,426
- Filed: 2019-06-19
- Published: 2020-12-24
- Earliest claimed: 2019-06-19
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Ali Javadiabhari; Scott D. Lekuch; Ken Inoue
- Web page: https://patentgrep.com/patent/US20200401923A1

## CPC

- G06N 10/20: Models of quantum computing, e.g. quantum circuits or universal quantum computers
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- G06N 10/40: Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
- H03M 1/662: {Multiplexed conversion systems}
- G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

A quantum circuit generator for a quantum computer includes a controller; and a plurality of analog conversion units (ACUs) operatively connected to the controller, each ACU being operatively connected to a corresponding qubit of a plurality of qubits, wherein each ACU is configured to convert a digital input from the controller into an analog input at a microwave frequency to control a quantum state of the corresponding qubit. The controller is configured to generate a quantum circuit using at least two qubits of the plurality of qubits, the at least two qubits being selected by the controller based on corresponding classical bits being mapped by the controller and based on latency of the generated quantum circuit so that the generated quantum circuit has a latency less than a threshold latency.

## Claims

### Claim 1

A quantum circuit generator for a quantum computer, comprising:
a controller;
a plurality of analog conversion units (ACUs) operatively connected to the controller, each ACU being operatively connected to a corresponding qubit of a plurality of qubits, wherein each ACU is configured to convert a digital input from the controller into an analog input at a microwave frequency to control a quantum state of the corresponding qubit;
wherein said controller is configured to generate a quantum circuit using at least two qubits of the plurality of qubits, the at least two qubits being selected by the controller based on corresponding classical bits being mapped by the controller and based on latency of the generated quantum circuit so that the generated quantum circuit has a latency less than a threshold latency.

### Claim 2 (depends on 1)

The quantum circuit generator according to claim 1, wherein the latency of the quantum circuit comprises a latency of qubit readout of each of the at least two qubits from quantum to classical.

### Claim 3 (depends on 2)

The quantum circuit generator according to claim 2, wherein the latency of the quantum circuit comprises a latency due to classical logic processing in the controller and a latency due to a relative position of the analog conversion units.

### Claim 4 (depends on 1)

The quantum circuit generator according to claim 1, wherein the latency threshold corresponds to a lowest latency obtained by selecting at least two qubits that are closest to each other so as to reduce a relative position of analog conversion units associated with the at least two qubits.

### Claim 5 (depends on 1)

The quantum circuit generator according to claim 1, wherein each analog conversion unit (ACU) comprises a field programmable gate array (FPGA), an arbitrary waveform generator (AWG), or an application specific integrated circuit (ASIC).

### Claim 6 (depends on 5)

The quantum circuit generator according to claim 5, wherein each ACU further comprises a local oscillator (LO) configured to generate a lower frequency wave radiation and a mixer configured to convert the lower frequency wave radiation into a higher frequency microwave radiation.

### Claim 7 (depends on 6)

The quantum circuit generator according to claim 6, wherein the higher frequency microwave radiation is generated to control the quantum state of the corresponding qubit.

### Claim 8 (depends on 6)

The quantum circuit generator according to claim 6, wherein each ACU further comprises at least one bandpass filter configured to filter a frequency of the higher frequency microwave radiation.

### Claim 9

A quantum computer, comprising:
a refrigeration container defining a refrigeration chamber therein;
a quantum processor disposed inside the refrigeration chamber, the quantum processor comprising a plurality of qubits, at least two qubits in said plurality of qubits being selectable to generate a quantum circuit, said quantum circuit having a latency;
wherein said quantum processor is configurable to construct a quantum circuit using a quantum circuit generator in communication with said plurality of qubits, the quantum circuit generator comprising:
a controller;
a plurality of analog conversion units (ACUs) operatively connected to the controller, each ACU being operatively connected to a corresponding qubit of the plurality of qubits, wherein each ACU is configured to convert a digital input from the controller into an analog input at a microwave frequency to control a quantum state of the corresponding qubit;
wherein said controller is configured to generate the quantum circuit using at least two qubits of the plurality of qubits, the at least two qubits being selected by the controller based on corresponding classical bits being mapped by the controller and based on latency of the generated quantum circuit so that the generated quantum circuit has a latency less than a threshold latency.

### Claim 10 (depends on 9)

The quantum computer according to claim 9, wherein the controller is a classical computer.

### Claim 11 (depends on 10)

The quantum computer according to claim 10, wherein the latency of the quantum circuit comprises a latency of qubit readout of each of the at least two qubits from quantum to classical.

### Claim 12 (depends on 11)

The quantum computer according to claim 11, wherein the latency of the quantum circuit comprises a latency due to classical logic processing in the controller and a latency due to a relative position of the ACUs.

### Claim 13 (depends on 9)

The quantum computer according to claim 9, wherein the latency threshold corresponds to a lowest latency obtained by selecting at least two qubits that are closest to each other so as to reduce a relative position of digital to analog converters associated with the at least two qubits.

### Claim 14 (depends on 9)

The quantum computer according to claim 9, wherein each ACU comprises a field programmable gate array (FPGA), an arbitrary waveform generator (AWG), or an application specific integrated circuit (ASIC).

### Claim 15 (depends on 14)

The quantum computer according to claim 14, wherein each ACU further comprises a local oscillator (LO) configured to generate a lower frequency wave radiation and a mixer configured to convert the lower frequency wave radiation into a higher frequency microwave radiation.

### Claim 16 (depends on 15)

The quantum computer according to claim 15, wherein the higher frequency microwave radiation is generated to control the quantum state of the corresponding qubit.

### Claim 17 (depends on 15)

The quantum computer according to claim 15, wherein each ACU further comprises at least one bandpass filter configured to filter a frequency of the higher frequency microwave radiation.

### Claim 18

A method for reducing a latency of a quantum circuit, comprising:
mapping at least two qubits in a plurality of qubits to classical bits;
generating a quantum circuit using the at least two qubits of the plurality of qubits, the at least two qubits being selected by a controller based on corresponding classical bits being mapped by the controller;
determining a latency of the generated quantum circuit; and
selecting the at least two qubits in the plurality of qubits so that the generated quantum circuit has a latency less than a threshold latency.

### Claim 19 (depends on 18)

The method according to claim 18, further comprising converting a digital input from the controller using a plurality of analog conversion units (ACUs), each ACU being operatively connected to a corresponding qubit of the plurality of the qubits into an analog input at a microwave frequency to control quantum states of corresponding qubits.

### Claim 20 (depends on 19)

The method according to claim 19, further comprising selecting at least two qubits that are closest to each other so as to reduce a relative position of analog conversion units (ACUs) associated with the at least two qubits.

### Claim 21 (depends on 19)

The method according to claim 19, wherein the latency of the quantum circuit comprises a latency of qubit readout of each of the at least two qubits from quantum to classical.

### Claim 22 (depends on 21)

The method according to claim 21, wherein the latency of the quantum circuit comprises a latency due to classical logic processing in the controller and a latency due to a relative position of the analog conversion units (ACUs).

### Claim 23

A computer readable medium on which is stored non-transitory computer-executable code, which when executed by a controller causes the controller to:
map at least two qubits in a plurality of qubits to classical bits;
generate a quantum circuit using the at least two qubits of the plurality of qubits, the at least two qubits being selected by the controller based on corresponding classical bits being mapped by the controller;
determine a latency of the generated quantum circuit; and
select the at least two qubits in the plurality of qubits so that the generated quantum circuit has a latency less than a threshold latency.

### Claim 24 (depends on 23)

The computer readable medium according to claim 23, wherein the computer-executable code when executed by the controller causes the controller to control a plurality of analog conversion units (ACUs), each ACU being operatively connected to a corresponding qubit of the plurality of qubits, to output a microwave radiation to control quantum states of corresponding qubits.

### Claim 25 (depends on 24)

The computer readable medium according to claim 24, wherein the computer-executable code when executed by the controller causes the controller to select at least two qubits that are closest to each other so as to reduce a relative position of analog conversion units (ACUs) associated with the at least two qubits.
