# US 2020/0401514 A1 · Garbage collection adapted to memory device life expectancy > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2020/0401514 A1 - Document ID: US20200401514A1 - Status: Published application - Kind: A1 - Application number: 16/445,769 - Filed: 2019-06-19 - Published: 2020-12-24 - Earliest claimed: 2019-06-19 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Qing Liang; Deping He; David Aaron Palmer - Web page: https://patentgrep.com/patent/US20200401514A1 ## CPC - G06F 12/0253: {Garbage collection, i.e. reclamation of unreferenced memory} - G11C 11/1659: {Cell access} - G11C 16/10: Programming or data input circuits - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G06F 2212/7205: Cleaning, compaction, garbage collection, erase control - G06F 2212/7211: Wear leveling - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G11C 16/3495: {Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically} - G11C 2211/5641: Multilevel memory having cells with different number of storage levels - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract Systems and methods for adapting garbage collection (GC) operations in a memory device to an estimated device age are discussed. An exemplary memory device includes a memory controller to track an actual device age, determine a device wear metric using a physical write count and total writes over an expected lifetime of the memory device, estimate a wear-indicated device age, and adjust an amount of memory space to be freed by a GC operation according to the wear-indicated device age relative to the actual device age. The memory controller can also dynamically reallocate a portion of the memory cells between a single level cell (SLC) cache and a multi-level cell (MLC) storage according to the wear-indicated device age relative to the actual device age. ## Claims ### Claim 1 A memory device, comprising: a group of memory cells; and a memory controller, including: a device age tracker circuit configured to: track an actual device age, and determine a device wear metric using a physical write count and total writes over an expected lifetime of the memory device, the physical write count representing an amount of data physically written to the memory cells accumulated over the tracked actual device age; and estimate a wear-indicated device age in accordance with the determined device wear metric; a garbage collection (GC) controller configured to adjust an amount of memory space to be freed by a GC operation on a portion of the group of the memory cells according to the estimated wear-indicated device age relative to the tracked actual device age. ### Claim 2 (depends on 1) The memory device of claim 1, wherein the GC controller is configured to generate a control signal to initiate a discretionary GC operation when there is free memory space in the device memory available for host write. ### Claim 3 (depends on 1) The memory device of claim 1, wherein the device age tracker circuit is configured to: track a host write count representing an amount of data requested by a host to write to the memory cells; track a write amplification metric; and determine the physical write count using the tracked total host write count and the tracked write amplification. ### Claim 4 (depends on 1) The memory device of claim 1, wherein the device age tracker circuit is configured to estimate the wear-indicated device age using the expected lifetime of the memory device and the determined device wear metric. ### Claim 5 (depends on 1) The memory device of claim 1, wherein the GC controller is configured to adjust the amount of memory space to be freed by a GC operation using a comparison of the estimated wear-indicated device age to the actual device age. ### Claim 6 (depends on 5) The memory device of claim 5, wherein the device age tracker circuit is configured to track the actual device age using an internal oscillator of the memory device or a real-time clock. ### Claim 7 (depends on 5) The memory device of claim 5, wherein the GC controller is configured to: increase the amount of memory space to be freed by a GC operation if the actual device age exceeds the wear-indicated device age by a specified margin; or withhold a GC operation or decrease the amount of memory space to be freed by a GC operation if the actual device age is less than the wear-indicated device age by a specified margin. ### Claim 8 (depends on 1) The memory device of claim 1, further comprising a single level cell (SLC) cache controller configured to adjust a size of an SLC cache, including a reallocation of a portion of the memory cells between the SLC cache and a multi-level cell (MLC) storage, according to the estimated wear-indicated device age relative to the tracked actual device age. ### Claim 9 (depends on 8) The memory device of claim 8, wherein the SLC cache controller is configured to: increase the SLC cache size, including reduce the reallocation of memory cells in the SLC cache to the MLC storage, if the actual device age exceeds the wear-indicated device age by a specified margin; or reduce the SLC cache size, including increase the reallocation of memory cells in the SLC cache to the MLC storage, if the actual device age is less than the wear-indicated device age by a specified margin. ### Claim 10 (depends on 3) The memory device of claim 3, wherein the memory cells allocated as the MLC storage store three or more bits of data per memory cell. ### Claim 11 (depends on 1) The memory device of claim 1, wherein the workload tracker circuit is configured to determine the device wear metric and to estimate the wear-indicated device age continuously or periodically. ### Claim 12 (depends on 1) The memory device of claim 1, wherein the GC controller is configured to initiate a GC operation in response to a trigger event including at least one of: an actual device age exceeding an age threshold; an actual cumulative host write count exceeding a byte count threshold; or an actual cumulative physical write count exceeding a byte count threshold. ### Claim 13 (depends on 1) The memory device of claim 1, wherein the memory device is a solid state drive (SSD) device including NAND flash memories. ### Claim 14 A method of optimizing memory utilization in a memory device via a memory controller, the method comprising: tracking an actual device age; determining a device wear metric using a physical write count and total writes over an expected lifetime of the memory device, the physical write count representing an amount of data physically written to memory cells of the memory device accumulated over the tracked actual device age; estimating a wear-indicated device age in accordance with the determined device wear metric; and adjusting an amount of memory space to be freed by a garbage collection (GC) operation on a portion of the memory cells according to the estimated wear-indicated device age relative to the tracked actual device age. ### Claim 15 (depends on 14) The method of claim 14, wherein adjusting the memory space to be freed by a GC operation includes: increasing the amount of memory space to be freed by a GC operation if the actual device age exceeds the wear-indicated device age by a specified margin; and withholding the GC operation or decreasing the amount of memory space to be freed by a GC operation if the actual device age is less than the wear-indicated device age by a specified margin. ### Claim 16 (depends on 14) The method of claim 14, further comprising, based at least on the estimated wear-indicated device age, adjusting a size of a single-level cell (SLC) cache including adjusting reallocation of a portion of the memory cells between the SLC cache and a multi-level cell (MLC) storage. ### Claim 17 (depends on 16) The method of claim 16, wherein adjusting the SLC cache size includes: increasing the SLC cache size, including reducing the reallocation of memory cells in the SLC cache to the MLC storage, if the actual device age exceeds the wear-indicated device age by a specified margin; or reducing the SLC cache size, including increasing the reallocation of memory cells in the SLC cache to the MLC storage, if the actual device age is less than the wear-indicated device age by a specified margin. ### Claim 18 (depends on 14) The method of claim 14, comprising determining the physical write count using a host write count and a write amplification, and wherein determining the device wear metric includes using the physical write count and an endurance metric of the memory device. ### Claim 19 (depends on 14) The method of claim 14, wherein estimating the wear-indicated device age includes using the expected lifetime of the memory device and the determined device wear metric. ### Claim 20 (depends on 14) The method of claim 14, comprising detecting a trigger event, and initiating a GC operation in response to the detection of the trigger event, wherein the trigger event includes at least one of: the actual device age exceeding an age threshold; an actual cumulative host write count exceeding a byte count threshold; or an actual cumulative physical write count exceeding a byte count threshold.