# US 2020/0401479 A1 · Memory controller and method of operating the same

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- Number: US 2020/0401479 A1
- Document ID: US20200401479A1
- Status: Published application
- Kind: A1
- Application number: 16/696,860
- Filed: 2019-11-26
- Published: 2020-12-24
- Earliest claimed: 2019-06-18
- Assignees: SK hynix Inc.
- Applicants: SK hynix Inc.
- Inventors: Jong Hwan LEE
- Web page: https://patentgrep.com/patent/US20200401479A1

## CPC

- G06F 11/1068: {in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence)}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 11/1048: {using arrangements adapted for a specific error detection or correction feature}
- G06F 12/10: Address translation
- G06F 2212/1032: Reliability improvement, data loss prevention, degraded operation etc
- G06F 2212/7201: Logical to physical mapping or translation of blocks or pages
- G06F 2212/7203: Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
- G06F 2212/7211: Wear leveling
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Provided herein may be a memory controller and a method of operating the memory controller. The memory controller may control a memory device that stores data, and may include a bit counter configured to generate a count value by counting any one of bits in a programmed state and an erased state contained in the data, a flash translation layer configured to generate page information indicating an address of the data stored in the memory device, an additional data generator configured to generate judgment data for determining whether the data has changed, based on the count value and the page information, a comparator configured to generate comparison information by comparing the judgment data with detection data generated based on data read from the memory device, and a read data controller configured to perform an operation of correcting an error in the read data based on the comparison information.

## Claims

### Claim 1

A memory controller for controlling a memory device that stores data, comprising:
a bit counter configured to generate a first count value by counting a number of bits in a host data to be programmed at an address in the memory device in response to a program request received from a host;
a flash translation layer configured to generate a first page information indicating the address of the programmed data stored in the memory device;
an additional data generator configured to generate a judgment data based on the first count value and the first page information;
a comparator configured to generate a comparison information by comparing the judgment data with detection data, wherein the detection data is generated using the programmed data read from the memory device in response to a read request received from the host; and
a read data controller configured to perform an operation of correcting an error in the programmed data read from the memory device based on the comparison information.

### Claim 2 (depends on 1)

The memory controller according to claim 1, wherein the additional data generator generates the judgment data by summing the first count value and a value included in the first page information.

### Claim 3 (depends on 2)

The memory controller according to claim 2, wherein the additional data generator outputs an additional data that includes the judgment data and the host data received from the host.

### Claim 4 (depends on 1)

The memory controller according to claim 1, wherein the additional data generator is configured to, when the error in the programmed data read from the memory device is an uncorrectable error, output the judgment data to the comparator.

### Claim 5 (depends on 1)

The memory controller according to claim 1, wherein the bit counter is configured to, during a read operation of the memory device, generate a second count value by counting a number of bits in the programmed data read from the memory device.

### Claim 6 (depends on 5)

The memory controller according to claim 5, wherein the bit counter is configured to, during the read operation of the memory device, generate a second page information that indicates an address of the programmed data read from the memory device and generate a value of the detection data by summing the second count value and a value included in the second page information.

### Claim 7 (depends on 6)

The memory controller according to claim 6, wherein the comparator generates the comparison information by determining whether the value of the judgment data is identical to the value of the detection data.

### Claim 8 (depends on 7)

The memory controller according to claim 7, wherein the comparator receives the judgment data stored in the additional data generator and generates the comparison information.

### Claim 9 (depends on 7)

The memory controller according to claim 7, wherein the comparator receives the judgment data stored in the memory device and generates the comparison information.

### Claim 10 (depends on 7)

The memory controller according to claim 7, wherein the read data controller is configured to, when the value of the judgment data is not identical to the value of the detection data, change a bit contained in the programmed data read from the memory device.

### Claim 11 (depends on 10)

The memory controller according to claim 10, wherein the read data controller determines, based on the changed data, whether the error in the programmed data read from the memory device has been corrected.

### Claim 12 (depends on 11)

The memory controller according to claim 11, wherein the read data controller is configured to, when it is determined that the error in the programmed data read from the memory device has not been corrected, change any one bit other than the changed bit, among bits contained in the programmed data read from the memory device.

### Claim 13

A method of operating a memory controller for controlling a memory device that stores data, the method comprising:
receiving host data from a host;
generating a first count value by counting a bit in a programmed state or an erased state contained in the host data;
generating a first page information indicating an address of a page in which the host data is to be stored, among pages included in the memory device;
generating judgment data based on the first count value and the first page information;
generating detection data based on programmed data read from the memory device;
generating comparison information by comparing the judgment data with the detection data; and
performing an operation of correcting an error in the programmed data read from the memory device based on the comparison information.

### Claim 14 (depends on 13)

The method according to claim 13, wherein the judgment data includes a value by summing the first count value and a value included in the first page information.

### Claim 15 (depends on 14)

The method according to claim 14, further comprising:
outputting additional data that includes the judgment data and the host data so as to program the additional data to the memory device.

### Claim 16 (depends on 13)

The method according to claim 13, wherein generating the detection data comprises:
during a read operation of the memory device, generating a second count value by counting any one of bits in a programmed state and an erased state contained in the programmed data read from the memory device; and
generating a second page information that includes a value indicating information about an address at which the read operation is performed.

### Claim 17 (depends on 16)

The method according to claim 16, wherein the detection data includes a value by summing the second count value and the value included in the second page information.

### Claim 18 (depends on 16)

The method according to claim 16, wherein generating the comparison information comprises generating information for determining whether the value of the judgment data is identical to the value of the detection data.

### Claim 19 (depends on 18)

The method according claim 18, wherein performing the operation of correcting the error in the programmed data read from the memory device comprises, when the value of the judgment data is not identical to the value of the detection data, changing any one of bits contained in the programmed data read from the memory device.

### Claim 20 (depends on 19)

The method according claim 19, wherein performing the operation of correcting the error in the programmed data read from the memory device further comprises:
determining, based on the changed data, whether the error in the read data has been corrected; and
when it is determined that the error in the read data has not been corrected, changing any one bit other than the changed bit, among bits contained in the programmed data read from the memory device.
