# US 2020/0401477 A1 · Partial xor protection

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- Number: US 2020/0401477 A1
- Document ID: US20200401477A1
- Status: Published application
- Kind: A1
- Application number: 16/447,861
- Filed: 2019-06-20
- Published: 2020-12-24
- Earliest claimed: 2019-06-20
- Assignees: Western Digital Technologies, Inc.
- Applicants: Western Digital Technologies, Inc.
- Inventors: Avi Klein; Eran Sharon; Gadi Vishne; Igor Genshaft; Marina Frid; Michal Silbermintz
- Web page: https://patentgrep.com/patent/US20200401477A1

## CPC

- G06F 11/1068: {in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence)}
- G11C 29/50: Marginal testing, e.g. race, voltage or current testing
- G06F 3/0616: {in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 11/1048: {using arrangements adapted for a specific error detection or correction feature}
- G11C 29/52: Protection of memory contents; Detection of errors in memory contents
- G11C 2029/1202: {Word line control}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A system and method for applying a first level of protection to data in a memory module include identifying a weak wordline from at least one of a plurality of blocks of the memory module. Each of the plurality of blocks includes a plurality of wordlines. The system and method also include determining that the weak wordline is to receive the first level of protection and applying the first level of protection to the weak wordline.

## Claims

### Claim at position 1

1-11. (canceled)

### Claim 12

A memory device comprising:
a plurality of blocks of memory cells, wherein each of the plurality of blocks comprises a plurality of wordlines; and
a memory controller in communication with the plurality of blocks of memory cells, the memory controller configured to:
categorize the plurality of blocks of memory cells into a first pool of the blocks and a second pool of the blocks, wherein the second pool comprises suspected grown bad blocks of the plurality of blocks and the first pool comprises remaining blocks of the plurality of blocks that are not the suspected grown bad blocks;
apply a first level of protection to each of the plurality of wordlines of each of the suspected grown bad blocks in the second pool;
periodically monitor the remaining blocks of the memory module in the first pool for identifying an additional suspected grown bad block;
transfer the additional suspected grown bad block to the second pool; and
apply the first level of protection to each of the plurality of wordlines of the additional suspected grown bad block.

### Claim 13 (depends on 12)

The memory device of claim 12, wherein the memory controller is further configured to identify that a first block of the plurality of blocks is one of the suspected grown bad blocks or the additional suspected grown bad block based upon a parameter associated with the first block deviating from a predetermined threshold by a predetermined value.

### Claim 14 (depends on 12)

The memory device claim 12, wherein the memory controller is further configured to combine a wear leveling mechanism with the first level of protection.

### Claim 15 (depends on 12)

The memory device of claim 12, wherein the memory controller is further configured to comprising applying another protection to the remaining blocks of the memory module in the first pool.

### Claim 16

A memory device comprising:
one or more memory modules, each of the one or more memory modules comprising a plurality of blocks, and each of the plurality of blocks comprising a plurality of wordlines; and
a memory controller associated with each of the one or more memory modules,
wherein the memory controller is configured to:
identify a group of wordlines in the one or more memory modules for XOR protection;
apply the XOR protection to the group of wordlines; and
periodically monitor a plurality of wordlines in the one or more memory modules for which the XOR protection is not applied to update the group of wordlines for which the XOR protection is applied.

### Claim 17 (depends on 16)

The memory device of claim 16, wherein the memory controller is further configured to apply a second protection to each of the plurality of wordlines to which the memory controller does not apply the XOR protection.

### Claim 18 (depends on 16)

The memory device of claim 16, wherein the memory controller is further configured to apply a wear leveling mechanism to the group of wordlines in addition to the XOR protection.

### Claim 19 (depends on 16)

The memory device of claim 16, wherein the group of wordlines to which the XOR protection is applied comprise first four wordlines of each of the plurality of blocks.

### Claim 20

(canceled)

### Claim 21

An apparatus, comprising:
a memory controller configured to connect to a plurality of blocks of non-volatile memory cells, wherein the memory controller is configured to:
apply a first level of protection to reduce risk of losing data to a set of one or more word lines in a first block of the plurality of blocks; and
apply a second level of protection to reduce risk of losing data to a plurality of wordlines in the first block that do not receive the first level of protection.

### Claim 22 (depends on 21)

The apparatus of claim 21, wherein the first level of protection includes XOR protection.

### Claim 23 (depends on 22)

The apparatus of claim 22, wherein the second level of protection does not include XOR protection.

### Claim 24 (depends on 23)

The apparatus of claim 23, wherein:
the second level of protection includes error correction code protection.

### Claim 25 (depends on 21)

The apparatus of claim 21, wherein:
the first level of protection includes XOR protection over a first stripe height; and
the second level of protection includes XOR protection over a second stripe height that is larger than the first stripe height.

### Claim 26 (depends on 21)

The apparatus of claim 21, wherein the memory controller is further configured to:
include the first wordline in the set in response to identification of the first wordline as a weak wordline.

### Claim 27 (depends on 26)

The apparatus of claim 26, wherein the memory controller is further configured to:
measure a value of a parameter from each of the plurality of wordlines in the first block;
compute an average value of the measured value from each of the plurality of wordlines in the first block; and
identify the first wordline as a weak wordline in response to the value of the parameter for the first wordline deviating from the average value of the parameter by a predetermined threshold.

### Claim 28 (depends on 21)

The apparatus of claim 21, wherein the memory controller is further configured to:
select at least one suspected grown bad block from the plurality of blocks;
identify a weak wordline from each of the at least one suspected grown bad block; and
place the at least one suspected grown bad block in a first pool and placing remaining ones of the plurality of blocks in a second pool.

### Claim 29 (depends on 28)

The apparatus of claim 28, wherein the memory controller is further configured to:
periodically monitor the remaining ones of the plurality of blocks in the second pool for identifying an additional suspected grown bad block.

### Claim 30 (depends on 29)

The apparatus of claim 29, wherein the memory controller is further configured to:
transfer the additional suspected grown bad block to the first pool.

### Claim 31 (depends on 21)

The apparatus of claim 21, wherein the memory controller is further configured to:
designate a subset of the plurality of wordlines from each of the plurality of blocks as a weak wordline on which the first level of protection is applied.

### Claim 32 (depends on 15)

The memory device of claim 15, wherein:
the first level of protection includes XOR protection; and
the other level of protection does not include XOR protection.