# US 2020/0401451 A1 · Managing physical processor usage of shared memory buffer > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2020/0401451 A1 - Document ID: US20200401451A1 - Status: Published application - Kind: A1 - Application number: 16/447,119 - Filed: 2019-06-20 - Published: 2020-12-24 - Earliest claimed: 2019-06-20 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Muruganandam Somasundaram; Jeffrey Paul Kubala; Jerry A. Moody; Hunter J. Kauffman - Web page: https://patentgrep.com/patent/US20200401451A1 ## CPC - G06F 9/5016: {the resource being the memory} - G06F 9/45558: {Hypervisor-specific management and integration aspects} - G06F 12/023: {Free address space management} - G06F 2009/45583: {Memory management, e.g. access or allocation} - G06F 2209/5022: Workload threshold - G06F 2212/6042: Allocation of cache space to multiple users or processors - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract In an approach for managing physical processor usage of a shared memory buffer, a processor receives a request for memory. A processor receives a request for memory from a process running on a physical processor. A processor determines whether the request for memory is less than or equal to a pre-determined threshold, wherein the pre-determined threshold is based on characteristics of a server on which the physical processor resides, needs of the server, and a frequency of requests of each memory size. Responsive to determining the request for memory is greater than the pre-determined threshold, a processor identifies a node on which the physical processor resides. A processor identifies a memory buffer of a set of memory buffers allocated to the node on which the physical processor resides. A processor allocates the memory buffer. ## Claims ### Claim 1 A computer-implemented method for managing physical processor usage of a shared memory buffer, the computer-implemented method comprising: receiving a request for memory from a process running on a physical processor; determining whether the request for memory is less than or equal to a pre-determined threshold, wherein the pre-determined threshold is based on characteristics of a server on which the physical processor resides, needs of the server, and a frequency of requests for memory of each memory size; responsive to determining the request for memory is greater than the threshold, identifying a node on which the physical processor resides; identifying a memory buffer of a set of memory buffers allocated to the node on which the physical processor resides; and allocating the memory buffer. ### Claim 2 (depends on 1) The computer-implemented method of claim 1, wherein the set of memory buffers allocated to the node are managed using a bitmap for each memory buffer of the set of memory buffers with a one-to-one relationship between the node and each bitmap associated with the set of memory buffers for the node. ### Claim 3 (depends on 1) The computer-implemented method of claim 1, further comprising updating metadata of the memory buffer to reflect that the memory buffer has been allocated. ### Claim 4 (depends on 1) The computer-implemented method of claim 1, further comprising: responsive to allocating the memory buffer, clearing the memory buffer. ### Claim 5 (depends on 4) The computer-implemented method of claim 4, further comprising: responsive to clearing the memory buffer, returning control to the process and an address of the memory buffer. ### Claim 6 (depends on 1) The computer-implemented method of claim 1, wherein the process is a hypervisor process. ### Claim 7 (depends on 1) The computer-implemented method of claim 1, wherein the server comprises a set of drawers, a set of nodes, a set of chips, and a set of physical processors. ### Claim 8 A computer program product for monitoring data usage in a network by a plurality of network devices, the computer program product comprising: one or more computer readable storage media and program instructions stored on the one or more computer readable storage media, the program instructions comprising: program instructions to receive a request for memory from a process running on a physical processor; program instructions to determine whether the request for memory is less than or equal to a pre-determined threshold, wherein the pre-determined threshold is based on characteristics of a server on which the physical processor resides, needs of the server, and a frequency of requests for memory of each memory size; responsive to determining the request for memory is greater than the pre-determined threshold, program instructions to identify a node on which the physical processor resides; program instructions to identify a memory buffer of a set of memory buffers allocated to the node on which the physical processor resides; and program instructions to allocate the memory buffer. ### Claim 9 (depends on 8) The computer program product of claim 8, wherein the set of memory buffers allocated to the node are managed using a bitmap for each memory buffer of the set of memory buffers with a one-to-one relationship between the node and each bitmap associated with the set of memory buffers for the node. ### Claim 10 (depends on 8) The computer program product of claim 8, further comprising program instructions to update metadata of the memory buffer to reflect that the memory buffer has been allocated. ### Claim 11 (depends on 8) The computer program product of claim 8, further comprising: responsive to the program instructions to allocate the memory buffer, program instructions to clear the memory buffer. ### Claim 12 (depends on 11) The computer program product of claim 11, further comprising: responsive to the program instructions to clear the memory buffer, program instructions to return control to the process and an address of the memory buffer. ### Claim 13 (depends on 8) The computer program product of claim 8, wherein the process is a hypervisor process. ### Claim 14 (depends on 8) The computer program product of claim 8, wherein the server comprises a set of drawers, a set of nodes, a set of chips, and a set of physical processors. ### Claim 15 A computer system for monitoring data usage in a network by a plurality of network devices, the computer system comprising: one or more computer processors; one or more computer readable storage media; and program instructions stored on the computer readable storage media for execution by at least one of the one or more processors, the program instructions comprising: program instructions to receive a request for memory from a process running on a physical processor; program instructions to determine whether the request for memory is less than or equal to a pre-determined threshold, wherein the pre-determined threshold is based on characteristics of a server on which the physical processor resides, needs of the server, and a frequency of requests for memory of each memory size; responsive to determining the request for memory is greater than the pre-determined threshold, program instructions to identify a node on which the physical processor resides; program instructions to identify a memory buffer of a set of memory buffers allocated to the node on which the physical processor resides; and program instructions to allocate the memory buffer. ### Claim 16 (depends on 15) The computer system of claim 15, wherein the set of memory buffers allocated to the node are managed using a bitmap for each memory buffer of the set of memory buffers with a one-to-one relationship between the node and each bitmap associated with the set of memory buffers for the node. ### Claim 17 (depends on 15) The computer system of claim 15, further comprising program instructions to update metadata of the memory buffer to reflect that the memory buffer has been allocated. ### Claim 18 (depends on 15) The computer system of claim 15, further comprising: responsive to the program instructions to allocate the memory buffer, program instructions to clear the memory buffer; and responsive to the program instructions to clear the memory buffer, program instructions to return control to the process and an address of the memory buffer. ### Claim 19 (depends on 15) The computer system of claim 15, wherein the process is a hypervisor process. ### Claim 20 (depends on 15) The computer system of claim 15, wherein the server comprises a set of drawers, a set of nodes, a set of chips, and a set of physical processors.