# US 2020/0401404 A1 · Host processor configured with instruction set comprising resilient data move instructions

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- Number: US 2020/0401404 A1
- Document ID: US20200401404A1
- Status: Published application
- Kind: A1
- Application number: 16/444,577
- Filed: 2019-06-18
- Published: 2020-12-24
- Earliest claimed: 2019-06-18
- Assignees: EMC IP Holding Company LLC
- Applicants: EMC IP Holding Company LLC
- Inventors: Michael Robillard; Adrian Michaud; Dragan Savic
- Web page: https://patentgrep.com/patent/US20200401404A1

## CPC

- G06F 3/067: {Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]}
- G06F 9/30032: {Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE}
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/0647: {Migration mechanisms}
- G06F 3/0673: {Single storage device}
- G06F 9/3004: {to perform operations on memory}
- G06F 9/30043: {LOAD or STORE instructions; Clear instruction}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A system includes a host processor and at least one storage device coupled to the host processor. The host processor is configured to execute instructions of an instruction set, the instruction set comprising a first move instruction for moving data identified by at least one operand of the first move instruction into each of multiple distinct storage locations. The host processor, in executing the first move instruction, is configured to store the data in a first one of the storage locations identified by one or more additional operands of the first move instruction, and to store the data in a second one of the storage locations identified based at least in part on the first storage location. The instruction set in some embodiments further comprises a second move instruction for moving the data from the multiple distinct storage locations to another storage location.

## Claims

### Claim 1

A system comprising:
a host processor; and
at least one storage device coupled to the host processor;
the host processor being configured to execute instructions of an instruction set, the instruction set comprising a first move instruction for moving data identified by at least one operand of the first move instruction into each of multiple distinct storage locations, the first move instruction being configured to direct movement of data identified by the at least one operand of the first move instruction into each of the multiple distinct storage locations;
wherein the host processor in executing the first move instruction is configured:
to store the data in a first one of the storage locations identified by one or more additional operands of the first move instruction; and
to store the data in a second one of the storage locations identified based at least in part on the first storage location.

### Claim 2 (depends on 1)

The system of claim 1 wherein the host processor comprises a plurality of registers, and wherein the data to be moved by execution of the first move instruction is in a first one of the registers, the first register being identified by at least one operand of the first move instruction.

### Claim 3 (depends on 2)

The system of claim 2 wherein the first storage location is identified by an address contained in the one or more additional operands of the first move instruction.

### Claim 4 (depends on 3)

The system of claim 3 wherein the second storage location is identified as a function of the address and an offset contained in a second one of the registers.

### Claim 5 (depends on 4)

The system of claim 4 wherein the host processor in executing the first move instruction is configured:
to store the data from the first register in the first storage location identified by the address; and
to store the data from the first register in the second storage location identified as a function of the address and the offset.

### Claim 6 (depends on 4)

The system of claim 4 wherein the second storage location is identified as a sum of the address and the offset contained in the second register.

### Claim 7 (depends on 1)

The system of claim 1 wherein the instruction set further comprises a second move instruction for moving the data from the multiple distinct storage locations to another storage location;
the other storage location being identified by at least one operand of the second move instruction;
wherein the host processor in executing the second move instruction is configured:
to retrieve the data from the first storage location;
to retrieve the data from the second storage location;
to compare the retrieved data from the first storage location with the retrieved data from the second storage location;
responsive to the retrieved data from the first storage location being the same as the retrieved data from the second storage location, to store the data in the other storage location; and
responsive to the retrieved data from the first storage location being different than the retrieved data from the second storage location, to generate a notification indicative of the difference.

### Claim 8 (depends on 7)

The system of claim 7 wherein the host processor comprises a plurality of registers, and wherein the other storage location comprises a particular one of the registers identified by at least one operand of the second move instruction.

### Claim 9 (depends on 7)

The system of claim 7 wherein retrieving the data from the first and second storage locations comprises:
loading the data from the first storage location into a first hidden register of the host processor; and
loading the data from the second storage location into a second hidden register of the host processor.

### Claim 10 (depends on 9)

The system of claim 9 wherein comparing the retrieved data from the first storage location with the retrieved data from the second storage location comprises comparing contents of the first and second hidden registers.

### Claim 11 (depends on 7)

The system of claim 7 wherein generating a notification indicative of the difference comprises raising an application level exception.

### Claim 12 (depends on 1)

The system of claim 1 wherein the first and second storage locations are in one of:
respective distinct memory blocks of at least one volatile memory of the system; and
respective distinct memory blocks of at least one persistent memory of the system.

### Claim 13 (depends on 1)

The system of claim 1 wherein the first and second storage locations are in respective ones of a first memory block in a volatile memory of the system and a second memory block in a persistent memory of the system.

### Claim 14 (depends on 1)

The system of claim 1 wherein the first and second storage locations are in respective distinct fault domains of the system.

### Claim 15

A method comprising:
obtaining in a host processor of a system a first move instruction for moving data identified by at least one operand of the first move instruction into each of multiple distinct storage locations, the first move instruction being configured to direct movement of data identified by the at least one operand of the first move instruction into each of the multiple distinct storage locations; and
executing the first move instruction in the host processor;
wherein executing the first move instruction comprises:
storing the data in a first one of the storage locations identified by one or more additional operands of the first move instruction; and
storing the data in a second one of the storage locations identified based at least in part on the first storage location.

### Claim 16 (depends on 15)

The method of claim 15 wherein:
the host processor comprises a plurality of registers, and the data to be moved by execution of the first move instruction is in a first one of the registers;
the first register being identified by at least one operand of the first move instruction;
the first storage location being identified by an address contained in the one or more additional operands of the first move instruction; and
the second storage location being identified as a function of the address and an offset contained in a second one of the registers.

### Claim 17 (depends on 15)

The method of claim 15 further comprising:
obtaining in the host processor a second move instruction for moving the data from the multiple distinct storage locations to another storage location; and
executing the second move instruction in the host processor;
the other storage location being identified by at least one operand of the second move instruction;
wherein executing the second move instruction comprises:
retrieving the data from the first storage location;
retrieving the data from the second storage location;
comparing the retrieved data from the first storage location with the retrieved data from the second storage location;
responsive to the retrieved data from the first storage location being the same as the retrieved data from the second storage location, storing the data in the other storage location; and
responsive to the retrieved data from the first storage location being different than the retrieved data from the second storage location, generating a notification indicative of the difference.

### Claim 18

A computer program product comprising a non-transitory processor-readable storage medium having stored therein program code of one or more software programs, wherein the program code, when executed by a system comprising a host processor and at least one storage device coupled to the host processor, causes the system:
to obtain a first move instruction for moving data identified by at least one operand of the first move instruction into each of multiple distinct storage locations, the first move instruction being configured to direct movement of data identified by the at least one operand of the first move instruction into each of the multiple distinct storage locations; and
to execute the first move instruction in the host processor;
wherein executing the first move instruction comprises:
storing the data in a first one of the storage locations identified by one or more additional operands of the first move instruction; and
storing the data in a second one of the storage locations identified based at least in part on the first storage location.

### Claim 19 (depends on 18)

The computer program product of claim 18 wherein:
the host processor comprises a plurality of registers, and the data to be moved by execution of the first move instruction is in a first one of the registers;
the first register being identified by at least one operand of the first move instruction;
the first storage location being identified by an address contained in the one or more additional operands of the first move instruction; and
the second storage location being identified as a function of the address and an offset contained in a second one of the registers.

### Claim 20 (depends on 18)

The computer program product of claim 18 wherein the program code when executed by the system further causes the system:
to obtain in the host processor a second move instruction for moving the data from the multiple distinct storage locations to another storage location; and
to execute the second move instruction in the host processor;
the other storage location being identified by at least one operand of the second move instruction;
wherein executing the second move instruction comprises:
retrieving the data from the first storage location;
retrieving the data from the second storage location;
comparing the retrieved data from the first storage location with the retrieved data from the second storage location;
responsive to the retrieved data from the first storage location being the same as the retrieved data from the second storage location, storing the data in the other storage location; and
responsive to the retrieved data from the first storage location being different than the retrieved data from the second storage location, generating a notification indicative of the difference.
