# US 2020/0401331 A1 · Method to switch between traditional ssd and open-channel ssd without data loss

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- Number: US 2020/0401331 A1
- Document ID: US20200401331A1
- Status: Published application
- Kind: A1
- Application number: 16/449,718
- Filed: 2019-06-24
- Published: 2020-12-24
- Earliest claimed: 2019-06-24
- Assignees: Western Digital Technologies, Inc.
- Applicants: Western Digital Technologies, Inc.
- Inventors: Jameer Mulani; Anindya Rai; Saugata Das Purkayastha
- Web page: https://patentgrep.com/patent/US20200401331A1

## CPC

- G06F 3/0634: {by changing the state or mode of one or more devices}
- G06F 3/0604: {Improving or facilitating administration, e.g. storage management}
- G06F 3/0658: {Controller construction arrangements}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 12/1009: using page tables, e.g. page table structures
- G06F 2212/1004: Compatibility, e.g. with legacy hardware
- G06F 2212/1024: Latency reduction
- G06F 2212/1032: Reliability improvement, data loss prevention, degraded operation etc
- G06F 2212/7201: Logical to physical mapping or translation of blocks or pages
- G06F 2212/7208: Multiple device management, e.g. distributing data over multiple flash devices
- G06F 2212/7211: Wear leveling
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Apparatuses and techniques are provided for switching a solid-state device (SSD) between a traditional SSD mode and an open-channel SSD (OCSSD) mode. In one aspect, a set of commands are defined for communicating different types of data from a Flash Translation Layer (FTL) between the host and SSD. The commands can include different predetermined sets of bits which carry different types of FTL data in a standardized format. The commands can be transmitted using reserved data words in an interface specification which interfaces the host to the SSD. The commands can include commands to transfer a logical-to-physical address table, a validity bitmap and a wear table. A switch mode command can include a bit indicating whether the mode is to be switched from traditional SSD to OCSSD, or from OCSSD to traditional SSD.

## Claims

### Claim 1

An apparatus, comprising:
a plurality of blocks of memory cells and a control circuit arranged in a solid-state device, the control circuit manages flash translation layer processes for the plurality of blocks, and the control circuit, to transition managing of the flash translation layer processes from the solid-state device to a host, is configured to:
transmit a command to the host to synchronize a logical-to-physical address table; and
transmit a command to the host to synchronize a validity bitmap.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein:
the control circuit is configured to, in response to a confirmation from the host indicating that the transition is complete, update a configuration file to indicate that a role of the solid-state device has changed from a traditional solid-state device to an open-channel solid-state device.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the command to synchronize the logical-to-physical address table identifies:
a scatter gather list entry of the logical-to-physical address table;
a maximum logical block address; and
a size of the logical-to-physical address table.

### Claim 4 (depends on 3)

The apparatus of claim 3, wherein the command to synchronize the logical-to-physical address table comprises:
a bit indicating that the logical-to-physical address table is to be copied to the host.

### Claim 5 (depends on 3)

The apparatus of claim 3, wherein:
the command to synchronize the logical-to-physical address table comprises a set of consecutive bits in which a first predetermined subset of the set of consecutive bits is reserved for the scatter gather list entry, a second predetermined subset of the set of consecutive bits is reserved for the maximum logical block address, and a third predetermined subset of the set of consecutive bits is reserved for the size of the logical-to-physical address table.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein the command to synchronize the validity bitmap identifies:
a scatter gather list entry of the validity bitmap; and
a size of the validity bitmap.

### Claim 7 (depends on 6)

The apparatus of claim 6, wherein the command to synchronize the validity bitmap comprises:
a bit indicating that the validity bitmap is to be copied to the host.

### Claim 8 (depends on 6)

The apparatus of claim 6, wherein:
the command to synchronize the validity bitmap comprises a set of consecutive bits in which a first predetermined subset of the set of consecutive bits is reserved for the scatter gather list entry, and a second predetermined subset of the set of consecutive bits is reserved for a size of the validity bitmap.

### Claim 9 (depends on 1)

The apparatus of claim 1, wherein the control circuit, to transition managing of the flash translation layer processes from the solid-state device to the host, is configured to transmit a command to the host to synchronize a wear table of the flash translation layer, the command to synchronize the wear table comprises:
bits identifying a scatter gather list entry of the wear table; and
bits indicating a size of the wear table.

### Claim 10 (depends on 9)

The apparatus of claim 9, wherein the command to synchronize the wear table comprises:
a bit indicating that the wear table is to be copied to the host.

### Claim 11 (depends on 1)

The apparatus of claim 1, wherein:
the control circuit is configured to begin to transition the managing of the flash translation layer processes in response to receiving a switch mode command from the host, the switch mode command comprises a bit indicating that the managing of the flash translation layer processes is be transitioned from the solid-state device to the host.

### Claim 12 (depends on 1)

The apparatus of claim 1, wherein:
a format in which the logical-to-physical address table is stored in the solid-state device is different than a format in which the logical-to-physical address table is stored in the host.

### Claim 13 (depends on 1)

The apparatus of claim 1, wherein:
the commands are transmitted using reserved data words in an interface specification which interfaces the host to the solid-state device.

### Claim 14

A method, comprising:
receiving a first command at a solid-state device to synchronize a logical-to-physical address table of a host, the first command comprising a scatter gather list entry of respective addresses of the logical-to-physical address table;
in response to the first command, read the logical-to-physical address table from the host using the respective addresses;
receiving a second command at the solid-state device to synchronize a validity bitmap of the host, the second command comprising a scatter gather list entry of respective addresses of the validity bitmap;
in response to the second command, read the validity bitmap from the host using the respective addresses;
recycling a plurality of blocks of memory cells of the solid-state device; and
in response to completion of the recycling, updating a configuration file to indicate that a role of the solid-state device has changed from an open-channel solid-state device in which flash translation layer processes are managed by the host to a traditional solid-state device in which the flash translation layer processes are managed by the solid-state device.

### Claim 15 (depends on 14)

The method of claim 14, wherein:
the recycling ensures that the plurality of blocks of memory cells are rewritten using the logical-to-physical address table and the validity bitmap in a format which is compatible with the solid-state device.

### Claim 16 (depends on 14)

The method of claim 14, further comprising:
during the recycling, using the validity bitmap to identify pages of data which are to be recycled from a chunk of data, the chunk of data comprising one or more blocks of the plurality of blocks.

### Claim 17 (depends on 14)

The method of claim 14, further comprising:
during the recycling, setting free a chunk of data which is invalid according to the validity bitmap, the chunk of data comprising one or more blocks of the plurality of blocks.

### Claim 18 (depends on 14)

The method of claim 14, further comprising:
receiving a third command at the solid-state device to synchronize a wear table of the host, the third command comprising a scatter gather list entry of respective addresses of the wear table; and
in response to the third command, read the wear table from the host using the respective addresses.

### Claim 19

A method, comprising:
receiving a command at a solid-state device to transition the solid-state device from a traditional solid-state device in which flash translation layer processes are managed by the solid-state device to an open-channel solid-state device in which the flash translation layer processes are managed by a host; and
in response to the command to transition the solid-state device from the traditional solid-state device to the open-channel solid-state device, transmitting from the solid-state device to the host, commands identifying different types of data of the flash translation layer processes and respective addresses of the different types of data at the solid-state device to allow the host to read the different types of data from the solid-state device using the respective addresses and manage the flash translation layer processes using the different types of data of the flash translation layer.

### Claim 20 (depends on 19)

The method of claim 19, wherein:
the different types of data of the flash translation layer comprise at least one of a logical-to-physical address table, a validity bitmap or a wear table.