# US 2020/0401326 A1 · Semiconductor storage device

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- Number: US 2020/0401326 A1
- Document ID: US20200401326A1
- Status: Published application
- Kind: A1
- Application number: 17/009,893
- Filed: 2020-09-02
- Published: 2020-12-24
- Earliest claimed: 2019-03-20
- Assignees: Kioxia Corporation
- Applicants: Kioxia Corporation
- Inventors: Akihisa FUJIMOTO; Atsushi KONDO; Hajime SUDA
- Web page: https://patentgrep.com/patent/US20200401326A1

## CPC

- G06F 1/3225: of memory devices
- G06F 3/0625: {Power saving in storage systems}
- G06F 1/1658: {related to the mounting of internal components, e.g. disc drive or any other functional module}
- G06F 1/203: {for portable computers, e.g. for laptops}
- G06F 1/206: {comprising thermal management}
- G06F 1/28: Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
- G06F 1/3206: Monitoring of events, devices or parameters that trigger a change in power modality
- G06F 1/3275: {Power saving in memory, e.g. RAM, cache}
- G06F 3/0658: {Controller construction arrangements}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

According to one embodiment, a semiconductor includes a first surface and a second surface. The semiconductor storage device includes a nonvolatile memory, a controller to control the nonvolatile memory, and terminals exposed in the first surface. The controller transmits first data indicative of a temperature of the controller measured by a temperature sensor, second data indicative of a temperature difference between the temperature of the controller and a temperature of the first surface, and third data indicative of a temperature difference between the temperature of the controller and a temperature of the second surface to a host device.

## Claims

### Claim 1

A semiconductor storage device which is capable of being placed into a host device and includes a first surface and a second surface which is placed in an opposite side of the first surface, the semiconductor storage device comprising:
a nonvolatile memory;
a controller configured to control the nonvolatile memory; and
a plurality of terminals exposed in the first surface, including a plurality of signal terminals used for signal transferring, wherein
the controller is configured to transmit first data indicative of a temperature of the controller measured by a temperature sensor, second data indicative of a temperature difference between the temperature of the controller and a temperature of the first surface, and third data indicative of a temperature difference between the temperature of the controller and a temperature of the second surface to the host device, using at least one of the signal terminals.

### Claim 2 (depends on 1)

The semiconductor storage device of claim 1, wherein
the controller calculates the second data and the third data based on a thermal resistance model correlated with a power consumption of the semiconductor storage device.

### Claim 3 (depends on 1)

The semiconductor storage device of claim 1, wherein
the second data is calculated as a product of a first thermal resistance between the controller and the first surface and a power consumption of the semiconductor storage device, and
the third data is calculated as a product of a second thermal resistance between the controller and the second surface and the power consumption of the semiconductor storage device.

### Claim 4 (depends on 3)

The semiconductor storage device of claim 3, wherein
the power consumption of the semiconductor storage device is calculated as a sum of a power consumption of the controller and a power consumption of the nonvolatile memory,
the first thermal resistance is represented by a first linear function of a power ratio indicative of a ratio of the power consumption of the controller to the power consumption of the semiconductor storage device, and
the second thermal resistance is represented by a second linear function of the power ratio.

### Claim 5 (depends on 4)

The semiconductor storage device of claim 4, wherein
the power ratio is calculated based on (i) a ratio of a power consumption of the controller in a read operation to read data from the nonvolatile memory to a power consumption of the semiconductor storage device in the read operation, (ii) a ratio of a power consumption of the controller in a write operation to write data to the nonvolatile memory to a power consumption of the semiconductor storage device in the write operation, and (iii) a number of read operations and a number of write operations executed in a first period of time.

### Claim 6 (depends on 4)

The semiconductor storage device of claim 4, wherein
the power consumption of the semiconductor storage device is calculated based on (i) a power consumption of the controller in a read operation to read data from the nonvolatile memory, (ii) a power consumption of the nonvolatile memory in the read operation, (iii) a power consumption of the controller in a write operation to write data to the nonvolatile memory, (iv) a power consumption of the nonvolatile memory in the write operation, and (v) a number of read operations and a number of write operations executed in a first period of time.

### Claim 7 (depends on 1)

The semiconductor storage device of claim 1, wherein
the semiconductor storage device is connectable to the host device in accordance with a NVMe specification, and
the controller is configured to transmit, in response to a request of acquiring SMART/Health Information received from the host device, the SMART/Health Information to the host device, the SMART/Health Information including the first data, the second data, and the third data.

### Claim 8 (depends on 1)

The semiconductor storage device of claim 1, wherein
the semiconductor storage device is connectable to the host device in accordance with a NVMe specification, and
the controller is configured to transmit, in response to a request of acquiring SMART/Health Information received from the host device, the SMART/Health Information to the host device, the SMART/Health Information including the first data, the second data, and the third data, wherein the first data is set as a value of Composite Temperature in the SMART/Health Information.

### Claim 9 (depends on 4)

The semiconductor storage device of claim 4, wherein
the controller calculates the power ratio based on a number of lanes of PCIe used in data transferring, a number of stacks of the nonvolatile memory, and power state of the semiconductor storage device.

### Claim 10 (depends on 1)

The semiconductor storage device of claim 1, wherein
the semiconductor storage device is a card-shaped package.

### Claim 11

A semiconductor storage device which is capable of being placed into a host device and has a first surface and a second surface which is placed in an opposite side of the first surface, the semiconductor storage device comprising:
a nonvolatile memory;
a controller configured to control the nonvolatile memory; and
a plurality of terminals exposed in the first surface, including a plurality of signal terminals used for signal transferring, wherein
the controller is configured to transmit first data indicative of an internal temperature of the semiconductor storage device, second data indicative of a temperature of the second surface in a case where heat in the semiconductor storage device dissipates to an outside of the semiconductor storage device through the first surface, and third data indicative of a temperature of the second surface in a case where the heat in the semiconductor storage device dissipates to the outside of the semiconductor storage device through the first surface and the heat further dissipates to the outside of the semiconductor storage device through the second surface, using at least one of the signal terminals.

### Claim 12 (depends on 11)

The semiconductor storage device of claim 11, wherein
the controller calculates the second data and the third data based on the first data and a thermal resistance model correlated with a power consumption of the semiconductor storage device.

### Claim 13 (depends on 11)

The semiconductor storage device of claim 11, wherein
the second data is calculated by subtracting a product of a first thermal resistance and the power consumption of the semiconductor storage device from the temperature of the controller, the first thermal resistance being a thermal resistance which generates a temperature difference between the controller and the second surface when the heat in the semiconductor storage device dissipates to the outside of the semiconductor storage device through the first surface, and
the third data is calculated by subtracting a product of a second thermal resistance and the power consumption of the semiconductor storage device from the second data, the second thermal resistance being a thermal resistance which decreases a temperature of the second surface below the second data in a case where the heat in the semiconductor storage device dissipates to the outside of the semiconductor storage device through the first surface and the heat further dissipates to the outside of the semiconductor storage device through the second surface.

### Claim 14 (depends on 13)

The semiconductor storage device of claim 13, wherein
the power consumption of the semiconductor storage device is calculated as a sum of a power consumption of the controller and a power consumption of the nonvolatile memory,
the first thermal resistance is represented by a first linear function of a power ratio indicative of a ratio of the power consumption of the controller to the power consumption of the semiconductor storage device, and
the second thermal resistance is represented by a second linear function of the power ratio.

### Claim 15 (depends on 14)

The semiconductor storage device of claim 14, wherein
the power ratio is calculated based on (i) a ratio of a power consumption of the controller in a read operation to read data from the nonvolatile memory to a power consumption of the semiconductor storage device in the read operation, (ii) a ratio of a power consumption of the controller in a write operation to write data to the nonvolatile memory to a power consumption of the semiconductor storage device in the write operation, and (iii) a number of read operations and a number of write operations executed in a first period of time.

### Claim 16 (depends on 14)

The semiconductor storage device of claim 14, wherein
the power consumption of the semiconductor storage device is calculated based on (i) a power consumption of the controller in a read operation to read data from the nonvolatile memory, (ii) a power consumption of the nonvolatile memory in the read operation, (iii) a power consumption of the controller in a write operation to write data to the nonvolatile memory, (iv) a power consumption of the nonvolatile memory in the write operation, and (v) a number of read operations and a number of write operations executed in a first period of time.

### Claim 17 (depends on 11)

The semiconductor storage device of claim 11, wherein
the semiconductor storage device is connectable to the host device in accordance with a NVMe specification, and
the controller is configured to transmit, in response to a request of acquiring SMART/Health Information received from the host device, the SMART/Health Information including the first data, the second data, and the third data to the host device.

### Claim 18 (depends on 11)

The semiconductor storage device of claim 11, wherein
the semiconductor storage device is connectable to the host device in accordance with a NVMe specification, and
the controller is configured to transmit, in response to a request of acquiring SMART/Health Information received from the host device, the SMART/Health Information to the host device, the SMART/Health Information including the first data, the second data, and the third data, wherein the first data is set as a value of Composite Temperature in the SMART/Health Information.

### Claim 19 (depends on 13)

The semiconductor storage device of claim 13, wherein
the first thermal resistance is calculated such that a product of the first thermal resistance and the power consumption of the semiconductor storage device represents a temperature difference between the temperature of the controller and the temperature of the second surface.

### Claim 20 (depends on 11)

The semiconductor storage device of claim 11, wherein
the semiconductor storage device is a card-shaped package.

### Claim 21

A memory system comprising:
a host device; and
a semiconductor storage device which is capable of being placed into the host device and includes a first surface and a second surface which is placed in an opposite side of the first surface,
the semiconductor storage device being connectable to the host device in accordance with a NVMe specification, and
the semiconductor storage device comprising:
a nonvolatile memory;
a controller configured to control the nonvolatile memory; and
a plurality of terminals exposed in the first surface, including a plurality of signal terminals used for signal transferring, wherein
the controller is configured to transmit first data indicative of a temperature of the controller measured by a temperature sensor, second data indicative of a temperature difference between the temperature of the controller and a temperature of the first surface, and third data indicative of a temperature difference between the temperature of the controller and a temperature of the second surface to the host device, using at least one of the signal terminals, wherein the controller transmits, in response to a request of acquiring SMART/Health Information received from the host device, the SMART/Health Information to the host device, the SMART/Health Information including the first data, the second data, and the third data, the first data being set as a value of Composite Temperature in the SMART/Health Information,
the host device is configured to read the first data set in the Composite Temperature of the SMART/Health Information sent from the semiconductor storage device and the second data and the third data set in the SMART/Health Information, and to calculate a temperature of the first surface by subtracting a product of a first distribution ratio and the second data from the first data, and a temperature of the second surface by subtracting a product of a second distribution ratio and the third data from the first data,
the first distribution ratio being a ratio to distribute a power consumption of the semiconductor storage device to the first surface, and the second distribution ratio being a ratio to distribute the power consumption of the semiconductor storage device to the second surface.

### Claim 22 (depends on 21)

The memory system of claim 21, wherein
the first distribution ratio and the second distribution ratio are determined based on a heat dissipation mechanism of the host device.

### Claim 23

A memory system comprising:
a host device; and
a semiconductor storage device which is capable of being placed into the host device and includes a first surface and a second surface which is placed in an opposite side of the first surface,
the semiconductor storage device comprising:
a nonvolatile memory;
a controller configured to control the nonvolatile memory; and
a plurality of terminals exposed in the first surface, including a plurality of signal terminals used for signal transferring, wherein
the controller is configured to transmit first data indicative of an internal temperature of the semiconductor storage device, second data indicative of a temperature of the second surface in a case where heat in the semiconductor storage device dissipates to an outside of the semiconductor storage device through the first surface, and third data indicative of a temperature of the second surface in a case where the heat in the semiconductor storage device dissipates to the outside of the semiconductor storage device through the first surface and the heat further dissipates to the outside of the semiconductor storage device through the second surface, using at least one of the signal terminals,
the third data is smaller than the second data, and the second data and the third data are greater than data representing an ambient temperature of the semiconductor storage device.
