# US 2020/0401202 A1 · Power configuration component including selectable configuration profiles > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2020/0401202 A1 - Document ID: US20200401202A1 - Status: Published application - Kind: A1 - Application number: 16/996,256 - Filed: 2020-08-18 - Published: 2020-12-24 - Earliest claimed: 2018-08-09 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Matthew D. Rowley; Adam J. Hieb - Web page: https://patentgrep.com/patent/US20200401202A1 ## CPC - G06F 1/325: {Power saving in peripheral device} - G06F 1/3268: {Power saving in hard disk drive} - G06F 1/3296: by lowering the supply or operating voltage - G06F 3/0625: {Power saving in storage systems} - G06F 3/0634: {by changing the state or mode of one or more devices} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G06F 9/44505: {Configuring for program initiating, e.g. using registry, configuration files} - G11C 5/14: Power supply arrangements {, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels} - G11C 16/30: Power supply circuits - G11C 7/1045: {Read-write mode select circuits} - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract A power management system includes a memory component storing a plurality of configuration profiles. A plurality of configuration pins are operatively coupled to the memory component. One or more of the plurality of configuration pins receive one or more signals to selectively activate one of the plurality of configuration profiles. ## Claims ### Claim 1 An apparatus, comprising: a power management integrated circuit (PMIC) comprising internal memory and being disposed on a memory sub-system, the internal memory configured to store a plurality of configuration profiles; and configuration pins operatively coupled to the PMIC, wherein one or more of the configuration pins receive signal to activate at least one of the plurality of configuration profiles, wherein the activated at least one of the plurality of configuration profiles causes the PMIC to operate according to a particular set of operating characteristics. ### Claim 2 (depends on 1) The system of claim 1, wherein the internal memory comprises a plurality of memory locations, and wherein respective configuration profiles of the plurality of configuration profiles are stored in respective memory locations of the internal memory. ### Claim 3 (depends on 1) The system of claim 1, wherein the activated at least one of the plurality of configuration profiles corresponds to a peripheral component interconnect express (PCIe) configuration profile, a serial AT attachment (SATA) configuration profile, a power backup signal, or a power consumption mode, or any combination thereof. ### Claim 4 (depends on 1) The system of claim 1, wherein the activated at least one of the plurality of configuration profiles corresponds a respective operating voltage, operational characteristic, or timing characteristic, or any combination thereof, than a different one of the configuration profiles. ### Claim 5 (depends on 1) The system of claim 1, wherein the PMIC is configured to receive the signal from a processor associated with the memory sub-system. ### Claim 6 (depends on 1) The system of claim 1, wherein the one or more of the configuration pins receive the signal to activate the at least one of the plurality of configuration profiles in response to a power-up operation. ### Claim 7 (depends on 1) The system of claim 1, wherein the one or more of the configuration pins receive the signal to activate the at least one of the plurality of configuration profiles in response to a reset operation. ### Claim 8 A method, comprising: receiving a configuration selection signal to a power management configuration pin of a power management integrated circuit (PMIC) comprising an internal memory storing a plurality of configuration profiles; and activating a configuration profile among the plurality of configuration profiles to cause the PMIC to operate according to a particular set of operating characteristics based on the configuration selection signal. ### Claim 9 (depends on 8) The method of claim 8, wherein receiving the configuration selection signal further comprises receiving the selection signal by a bootstrap configuration pin of the PMIC. ### Claim 10 (depends on 8) The method of claim 8, wherein receiving the selection signal to the power management configuration pin to activate the configuration profile further comprises receiving a control signal corresponding to the particular set of operating characteristics of the PMIC. ### Claim 11 (depends on 8) The method of claim 8, wherein the internal memory is a non-volatile read-only memory in which the configuration profiles are stored. ### Claim 12 (depends on 8) The method of claim 8, wherein causing the PMIC to operate according to the particular set of operating characteristics further comprises managing a power consumption of a memory sub-system. ### Claim 13 (depends on 8) The method of claim 8, wherein receiving the selection signal to the power management configuration pin to selectively activate the configuration profile further comprises accessing a lookup table stored in the internal memory of the PMIC. ### Claim 14 A system, comprising: a power management component comprising an internal memory storing a plurality of configuration profiles in respective portions of the internal memory; and a processor coupled to the power management component, the processor to: enable a configuration pin coupled to a power management component; and cause, responsive to enablement of the configuration pin, the power management component to operate according to a particular set of operating characteristics corresponding to one of the configuration profiles. ### Claim 15 (depends on 14) The system of claim 14, wherein the processor is to enable an output pin coupled to the power management component to manage a power consumption of a memory sub-system according to the particular set of operating characteristics. ### Claim 16 (depends on 14) The system of claim 14, wherein the processor is to access a data structure stored in a particular one of the respective portions of the internal memory to locate the configuration profile to be selectively activated. ### Claim 17 (depends on 14) The system of claim 14, wherein the processor is to apply a voltage of a particular magnitude to an output pin coupled to the power management component in response to enablement of a configuration profile corresponding to the particular set of operating characteristics. ### Claim 18 (depends on 14) The system of claim 14, wherein the processor is to cause the power management component to operate according to the particular set of operating characteristics in response to a power-up operation. ### Claim 19 (depends on 14) The system of claim 14, wherein the processor is to cause the power management component to operate according to the particular set of operating characteristics in response to a reset operation. ### Claim 20 (depends on 14) The system of claim 14, wherein the processor is to cause performance of a bootstrapping operation as part of selective activation of the configuration profile.