# US 2020/0401170 A1 · Semiconductor device, electronic component, and electronic device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2020/0401170 A1 - Document ID: US20200401170A1 - Status: Published application - Kind: A1 - Application number: 16/961,991 - Filed: 2019-01-10 - Published: 2020-12-24 - Earliest claimed: 2018-01-24 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Yuto YAKUBO; Kei TAKAHASHI - Web page: https://patentgrep.com/patent/US20200401170A1 ## CPC - G05F 1/56: using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) - H03F 3/45183: {Long tailed pairs (H03F3/4521, H03F3/45237 take precedence)} - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/3696: {Generation of voltages supplied to electrode drivers} - H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs} - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 62/80: characterised by the materials - H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors} - H10D 84/813: {Combinations of field-effect devices and capacitor only} - H10D 88/00: Three-dimensional [3D] integrated devices - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES - H03F: AMPLIFIERS - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A semiconductor device capable of changing drive capability as appropriate is provided. A semiconductor device (100A) includes first to third circuits (102, 103, 101) and a first holding circuit (SH2), and the first holding circuit (SH2) includes a first holding portion (node ND2) and holds a first potential. The first circuit (102) has a function of changing the first potential of the first holding portion (node ND2) to a second potential, and the second circuit (103) has a function of generating a bias current based on the first potential or the second potential of the first holding portion (node ND2). The third circuit (101) includes first to third terminals (TLa4, TLa1, TLa2) and has a function of generating a third potential in accordance with an input potential to the second terminal (TLa1) by supply of the bias current to the first terminal (TLa4) and outputting the third potential from the third terminal (TLa2). Thus, the amount of the bias current generated in the second circuit (103) is increased or decreased by the first circuit (102). ## Claims ### Claim 1 A semiconductor device comprising a first circuit, a second circuit, a third circuit, and a first holding circuit, wherein the first holding circuit comprises a first holding portion, wherein the first holding circuit has a function of bringing the first holding portion into an electrically floating state to hold a first potential of the first holding portion, wherein the first circuit has a function of changing the first potential of the first holding portion to a second potential, wherein the second circuit has a function of generating a bias current based on the first potential or the second potential of the first holding portion, wherein the third circuit comprises a first terminal, a second terminal, and a third terminal, and wherein the third circuit has a function of generating a third potential in accordance with an input potential to the second terminal of the third circuit by supply of the bias current to the first terminal of the third circuit and outputting the third potential from the third terminal of the third circuit. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the first circuit comprises a first capacitor, wherein a first terminal of the first capacitor is electrically connected to the first holding portion, and wherein the first circuit has a function of changing the first potential held in the first holding portion to the second potential by capacitive coupling of the first capacitor when a fourth potential is input to a second terminal of the first capacitor after the first holding circuit brings the first holding portion into an electrically floating state. ### Claim 3 (depends on 2) The semiconductor device according to claim 2, wherein the first circuit comprises a buffer circuit, and wherein an output terminal of the buffer circuit is electrically connected to the second terminal of the first capacitor. ### Claim 4 (depends on 2) The semiconductor device according to claim 2, wherein the first circuit comprises a multiplexer, and wherein an output terminal of the multiplexer is electrically connected to the second terminal of the first capacitor. ### Claim 5 (depends on 2) The semiconductor device according to claim 2, wherein the first circuit comprises a comparator, wherein an output terminal of the comparator is electrically connected to the second terminal of the first capacitor, wherein the third potential is input to a first input terminal of the comparator, and wherein a fifth potential is input to a second input terminal of the comparator. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the first holding circuit comprises a first transistor and a second capacitor, wherein the first holding portion is electrically connected to a first terminal of the first transistor and a first terminal of the second capacitor, and wherein the first transistor comprises a metal oxide in a channel formation region. ### Claim 7 (depends on 6) The semiconductor device according to claim 6, further comprising a fourth circuit, wherein the fourth circuit has a function of allowing a constant current to flow, wherein the fourth circuit is electrically connected to a second terminal of the first transistor, and wherein the first potential in accordance with the constant current is input to the first terminal of the first transistor when the first transistor is in a conduction state. ### Claim 8 (depends on 1) The semiconductor device according to claim 1, further comprising a second holding circuit, wherein the second holding circuit comprises a second holding portion, wherein the second holding portion is electrically connected to the second terminal of the third circuit, and wherein the second holding circuit has a function of bringing the second holding portion into an electrically floating state to hold the input potential to the second terminal of the third circuit. ### Claim 9 (depends on 8) The semiconductor device according to claim 8, wherein the second holding circuit comprises a second transistor and a third capacitor, wherein the second holding portion is electrically connected to a first terminal of the second transistor and a first terminal of the third capacitor, wherein the input potential is input to a second terminal of the second transistor, and wherein the second transistor comprises a metal oxide in a channel formation region. ### Claim 10 (depends on 1) An electronic component comprising the semiconductor device according to claim 1 and an integrated circuit over a printed circuit board. ### Claim 11 (depends on 1) An electronic device comprising the semiconductor device according to claim 1 and a housing.