# US 2020/0401169 A1 · Low leakage low dropout regulator with high bandwidth and power supply rejection, and associated methods > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2020/0401169 A1 - Document ID: US20200401169A1 - Status: Published application - Kind: A1 - Application number: 17/012,478 - Filed: 2020-09-04 - Published: 2020-12-24 - Earliest claimed: 2017-03-31 - Assignees: STMicroelectronics International N.V. - Applicants: STMicroelectronics International N.V. - Inventors: Kapil Kumar TYAGI; Nitin GUPTA - Web page: https://patentgrep.com/patent/US20200401169A1 ## CPC - G05F 1/468: {characterised by reference voltage circuitry, e.g. soft start, remote shutdown} - G05F 1/575: characterised by the feedback circuit - G05F 1/613: using semiconductor devices in parallel with the load as final control devices (G05F1/461 takes precedence) - G05F 1/561: {Voltage to current converters (amplifiers H03F)} - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES ## Abstract A method is for operating an electronic device formed by a low dropout regulator (LDO) having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node. The electronic device is turned on by turning on the LDO, removing a DC bias from the second conduction terminal of the transistor by opening a first switch that selectively couples the second conduction terminal of the transistor to a supply node through a first diode coupled transistor and by opening a second switch that selectively couples the second conduction terminal of the transistor to a ground node through a second diode coupled transistor, and turning on the transistor. The electronic device is turned off by turning off the transistor, forming the DC bias at the second conduction terminal of the transistor, and turning off the LDO. ## Claims ### Claim 1 A method of operating an electronic device comprised of a low dropout regulator having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node of the electronic device, wherein the method comprises: placing the electronic device into a power on mode by: turning on the low dropout regulator, removing a DC bias from the second conduction terminal of the transistor by opening a first switch that is for selectively coupling the second conduction terminal of the transistor to a supply node through a first impedance and by opening a second switch that is for selectively coupling the second conduction terminal of the transistor to a ground node through a second impedance, and turning on the transistor; and placing the electronic device into a power down mode by: turning off the transistor, applying the DC bias at the second conduction terminal of the transistor, and turning off the low dropout regulator. ### Claim 2 (depends on 1) The method of claim 1, wherein turning on the transistor when placing the electronic device into the power on mode comprises turning on the transistor before the DC bias is removed from the second conduction terminal of the transistor. ### Claim 3 (depends on 1) The method of claim 1, wherein turning on the transistor when placing the electronic device into the power on mode comprises turning on the transistor after the DC bias is removed from the second conduction terminal of the transistor. ### Claim 4 (depends on 1) The method of claim 1, wherein turning on the transistor when placing the electronic device into the power on mode comprises turning on the transistor along with removing the DC bias from the second conduction terminal of the transistor. ### Claim 5 (depends on 1) The method of claim 1, wherein turning off the transistor when placing the electronic device into the power down mode comprises turning off the transistor before the DC bias is applied at the second conduction terminal of the transistor. ### Claim 6 (depends on 1) The method of claim 1, wherein turning off the transistor when placing the electronic device into the power down mode comprises turning off the transistor after the DC bias is applied at the second conduction terminal of the transistor. ### Claim 7 (depends on 1) The method of claim 1, wherein turning off the transistor when placing the electronic device into the power down mode comprises turning off the transistor along with applying the DC bias at the second conduction terminal of the transistor. ### Claim 8 (depends on 1) The method of claim 1, wherein turning on the low dropout regulator comprises: opening a fourth switch that selectively couples an output of an amplifier of the low dropout regulator to the supply node, opening a third switch that selectively couples the output of the low dropout regulator to the supply node, and opening a sixth switch that selectively couples a resistive divider to the ground node. ### Claim 9 (depends on 8) The method of claim 8, wherein turning on the low dropout regulator is performed prior to removing the DC bias from the second conduction terminal of the transistor. ### Claim 10 (depends on 1) The method of claim 1, wherein turning on the transistor is performed by coupling a control terminal of the transistor to the ground node. ### Claim 11 (depends on 1) The method of claim 1, wherein turning off the transistor is performed by coupling a control terminal of the transistor to the supply node. ### Claim 12 (depends on 1) The method of claim 1, wherein applying the DC bias at the second conduction terminal of the transistor is performed by closing the first switch and closing the second switch. ### Claim 13 (depends on 1) The method of claim 1, wherein the first impedance is provided by at least one diode circuit and wherein the second impedance is provided by at least one diode circuit. ### Claim 14 A method of operating an electronic device comprised of a low dropout regulator having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node of the electronic device, wherein the method comprises: placing the electronic device into a power on mode by: turning on the low dropout regulator, removing a DC bias from the second conduction terminal of the transistor by selectively decoupling the second conduction terminal of the transistor from a supply node and a ground node, and turning on the transistor; and placing the electronic device into a power down mode by: turning off the transistor, applying the DC bias at the second conduction terminal of the transistor by selectively coupling the second conduction terminal of the transistor to the supply node and the ground node, and turning off the low dropout regulator; wherein turning on the transistor when placing the electronic device into the power on mode comprises turning on the transistor after the DC bias is removed from the second conduction terminal of the transistor. ### Claim 15 (depends on 14) The method of claim 14, wherein turning on the low dropout regulator comprises selectively decoupling an output of an amplifier of the low dropout regulator from the supply node, selectively decoupling the output of the low dropout regulator from the supply node, and selectively decoupling a resistive divider from the ground node. ### Claim 16 (depends on 14) The method of claim 14, wherein turning on the transistor is performed by selectively coupling a control terminal of the transistor to the ground node. ### Claim 17 (depends on 14) The method of claim 14, wherein turning off the transistor is performed by selectively coupling a control terminal of the transistor to the supply node. ### Claim 18 (depends on 14) The method of claim 14, wherein the DC bias is generated via a first impedance coupled between the second conduction terminal of the transistor and the supply node and a second impedance coupled between the second conduction terminal and the ground node. ### Claim 19 A method of operating an electronic device comprised of a low dropout regulator having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node of the electronic device, wherein the method comprises: placing the electronic device into a power on mode by: turning on the low dropout regulator, removing a DC bias from the second conduction terminal of the transistor by selectively decoupling the second conduction terminal of the transistor from a supply node and a ground node, and turning on the transistor; and placing the electronic device into a power down mode by: turning off the transistor, applying the DC bias at the second conduction terminal of the transistor by selectively coupling the second conduction terminal of the transistor to the supply node and the ground node, and turning off the low dropout regulator; wherein turning off the transistor when placing the electronic device into the power down mode comprises turning off the transistor after the DC bias is applied at the second conduction terminal of the transistor. ### Claim 20 (depends on 19) The method of claim 19, wherein turning on the low dropout regulator comprises selectively decoupling an output of an amplifier of the low dropout regulator from the supply node, selectively decoupling the output of the low dropout regulator from the supply node, and selectively decoupling a resistive divider from the ground node. ### Claim 21 (depends on 19) The method of claim 19, wherein turning on the transistor is performed by selectively coupling a control terminal of the transistor to the ground node. ### Claim 22 (depends on 19) The method of claim 19, wherein turning off the transistor is performed by selectively coupling a control terminal of the transistor to the supply node. ### Claim 23 (depends on 19) The method of claim 19, wherein the DC bias is generated via a first impedance coupled between the second conduction terminal of the transistor and the supply node and a second impedance coupled between the second conduction terminal and the ground node.