# US 2020/0401004 A1 · Driving circuit and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2020/0401004 A1 - Document ID: US20200401004A1 - Status: Published application - Kind: A1 - Application number: 15/931,401 - Filed: 2020-05-13 - Published: 2020-12-24 - Earliest claimed: 2019-06-20 - Assignees: LG Display Co., Ltd. - Applicants: LG Display Co., Ltd. - Inventors: SeongKyu KANG; SungChul KIM; HoonBae KIM; SunYeop KIM - Web page: https://patentgrep.com/patent/US20200401004A1 ## CPC - G02F 1/136286: {Wiring, e.g. gate line, drain line} - G09G 3/3655: {Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors} - G09G 3/3688: {suitable for active matrices only} - G02F 2201/121: common or background - G02F 2201/123: pixel - G09G 3/3677: {suitable for active matrices only} - G09G 2354/00: Aspects of interface with display user - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A display device includes a plurality of gate lines; a plurality of data lines; a plurality of pixel electrodes electrically connected with the plurality of data lines; a plurality of common electrodes corresponding to two or more pixel electrodes among the plurality of pixel electrodes; a data driving circuit outputting data voltages to the plurality of data lines; and a driving circuit outputting a first driving signal with a first voltage level to at least one common electrode among the plurality of common electrodes during a first driving period and a second driving signal with a second voltage level and a third voltage level to the at least one common electrode during a second driving period, the second driving signal being a pulse signal, wherein the second voltage level and the third voltage level differ from the first voltage level. ## Claims ### Claim 1 A display device, comprising: a plurality of gate lines; a plurality of data lines; a plurality of pixel electrodes electrically connected with the plurality of data lines; a plurality of common electrodes corresponding to two or more pixel electrodes among the plurality of pixel electrodes; a data driving circuit outputting data voltages to the plurality of data lines; and a driving circuit outputting a first driving signal with a first voltage level to at least one common electrode among the plurality of common electrodes during a first driving period and a second driving signal with a second voltage level and a third voltage level to the at least one common electrode during a second driving period, the second driving signal being a pulse signal, wherein the second voltage level and the third voltage level differ from the first voltage level. ### Claim 2 (depends on 1) The display device of claim 1, wherein the first voltage level is higher than the second voltage level and lower than the third voltage level. ### Claim 3 (depends on 1) The display device of claim 1, wherein the first voltage level is lower than the second voltage level, and the second voltage level is lower than the third voltage level. ### Claim 4 (depends on 1) The display device of claim 1, wherein at least a portion of the first driving period and a portion of the second driving period overlap with a period during which the data driving circuit outputs the data voltages. ### Claim 5 (depends on 1) The display device of claim 1, wherein a difference between a root mean square (RMS) value of differences between the first driving signal and the data voltages applied during the first driving period and an RMS value of differences between the second driving signal and the data voltages applied during the second driving period falls within a preset range when a grayscale represented by a data voltage applied in the first driving period is identical to a grayscale represented by a data voltage applied during the second driving period. ### Claim 6 (depends on 1) The display device of claim 1, further comprising: a first power circuit outputting a first voltage having the first voltage level; and a second power circuit outputting a second voltage having the second voltage level and a third voltage having the third voltage level, wherein the second power circuit outputs the first voltage outputted from the first power circuit to the driving circuit or outputs a modulated signal by a pulse width modulation, the second voltage, and the third voltage to the driving circuit. ### Claim 7 (depends on 1) The display device of claim 1, wherein the driving circuit receives a sensing signal from at least one common electrode to which the second driving signal is applied during the second driving period and outputs sensing data into which the received sensing signal is converted. ### Claim 8 (depends on 1) The display device of claim 1, wherein the data driving circuit outputs a data voltage modulated based on a pulse width modulation signal corresponding to the second driving signal during the second driving period. ### Claim 9 (depends on 1) The display device of claim 1, wherein, during the second driving period, a signal modulated based on a pulse width modulation signal corresponding to the second driving signal is applied to the plurality of gate lines. ### Claim 10 A driving circuit, comprising: an electrode driver outputting a first driving signal with a first voltage level to at least one common electrode of a plurality of common electrodes embedded in a panel during a first driving period, and a second driving signal with a second voltage level and a third voltage level to the at least one common electrode during a second driving period, wherein the second driving signal is a pulse signal, and the electrode driver receiving a sensing signal from at least one common electrode to which the second driving signal is applied during the second driving period; and a sensing signal converter outputting sensing data into which the sensing signal received during the second driving period is converted, wherein the second voltage level and the third voltage level differ from the first voltage level. ### Claim 11 (depends on 10) The driving circuit of claim 10, wherein the first voltage level is higher than the second voltage level and lower than the third voltage level. ### Claim 12 (depends on 10) The driving circuit of claim 10, wherein the first voltage level is lower than the second voltage level, and the second voltage level is lower than the third voltage level. ### Claim 13 (depends on 10) The driving circuit of claim 10, wherein a data voltage modulated based on a pulse width modulation signal corresponding to the second driving signal is applied to a pixel electrode corresponding to at least one common electrode among the plurality of common electrodes during at least a portion of the first driving period and the second driving period. ### Claim 14 (depends on 10) The driving circuit of claim 10, wherein the first voltage level of first voltage is generated from a first power circuit, and wherein the second voltage level of second voltage and the third voltage level of third voltage are generated from a second power circuit. ### Claim 15 (depends on 14) The driving circuit of claim 14, wherein the second power circuit outputs the first voltage received from the first power circuit or outputs a signal modulated based on a pulse width modulation signal, the second voltage, and the third voltage. ### Claim 16 A display device, comprising: a plurality of gate lines and a plurality of data lines crossing one another; a first power circuit outputting a first voltage; a second power circuit outputting a second voltage and a third voltage, a data driving circuit outputting a data voltage to the plurality of data lines; a driving circuit outputting a first driving signal to at least one common electrode during a first driving period and a second driving signal to the at least one common electrode during a second driving period, wherein the first driving signal has a first level and the second driving signal has a second third voltage levels that are different from the first voltage level, and at least a portion of the first driving period and a portion of the second driving period overlap with a period during which the data driving circuit outputs the data voltage. ### Claim 17 (depends on 16) The display device of claim 16, wherein the second power circuit outputs the first voltage outputted from the first power circuit to the driving circuit or outputs a pulse width modulated signal, the second voltage, and the third voltage to the driving circuit. ### Claim 18 (depends on 16) The display device of claim 16, wherein the driving circuit receives a sensing signal from the at least one common electrode to which the second driving signal is applied during the second driving period and outputs sensing data into which the received sensing signal is converted. ### Claim 19 (depends on 17) The display device of claim 17, wherein the pulse width signal corresponding to the second driving signal is applied to the plurality of gate lines during the second driving period. ### Claim 20 (depends on 16) The display device of claim 16, wherein a difference between a root mean square (RMS) value of differences between the first driving signal and the data voltages applied during the first driving period and an RMS value of differences between the second driving signal and the data voltages applied during the second driving period falls within a preset range when a grayscale represented by a data voltage applied during the first driving period is identical to a grayscale represented by a data voltage applied during the second driving period.