# US 2020/0396406 A1 · Image sensors having boost current control circuitry for column settling speedup

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- Number: US 2020/0396406 A1
- Document ID: US20200396406A1
- Status: Published application
- Kind: A1
- Application number: 16/860,220
- Filed: 2020-04-28
- Published: 2020-12-17
- Earliest claimed: 2019-06-12
- Assignees: Semiconductor Components Industries, LLC
- Applicants: Semiconductor Components Industries, LLC
- Inventors: Tom FRESON
- Web page: https://patentgrep.com/patent/US20200396406A1

## CPC

- H04N 25/76: Addressed sensors, e.g. MOS or CMOS sensors
- H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
- H04N 25/677: for reducing the column or line fixed pattern noise
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

An image sensor may include an array of imaging pixels arranged in rows and columns. Each column of imaging pixels may be coupled to a respective column output line. Each column output line may be coupled to a respective first current source. To decrease the settling time of the column output line, each column output line may be selectively coupled to a respective second current source during readout. Boost current control circuitry may control a transistor that applies the current from the second current source to the column output line. The boost current control circuitry may include a comparator that compares the actual current of the imaging pixels to a target current for the imaging pixels. Logic circuitry may use the output of the comparator to control the boost current enable transistor, the gain of a readout amplifier, and/or a dual conversion gain transistor.

## Claims

### Claim 1

An image sensor comprising:
imaging pixels;
a column output line that is coupled to a column of the imaging pixels;
a current source;
an amplifier having a first input coupled to the column output line and an output;
an analog-to-digital converter having a second input coupled to the output of the amplifier; and
control circuitry configured to:
selectively couple the current source to the column output line during readout; and
adjust a gain of the amplifier.

### Claim 2 (depends on 1)

The image sensor defined in claim 1, wherein the control circuitry comprises a comparator having a first input terminal coupled to the column of imaging pixels and a second input terminal coupled to an additional current source.

### Claim 3 (depends on 2)

The image sensor defined in claim 2, further comprising:
a transistor that is interposed between the current source and the column output line, wherein selectively coupling the current source to the column output line during readout comprises selectively asserting the transistor during readout.

### Claim 4 (depends on 3)

The image sensor defined in claim 3, wherein the control circuitry comprises logic circuitry that receives an output from the comparator and that provides a control signal to a gate terminal of the transistor.

### Claim 5 (depends on 4)

The image sensor defined in claim 4, wherein the control circuitry is configured to adjust the gain of the amplifier based on the output from the comparator.

### Claim 6 (depends on 4)

The image sensor defined in claim 4, wherein the control circuitry is configured to adjust the gain of the amplifier based on a time at which the output from the comparator flips.

### Claim 7 (depends on 1)

The image sensor defined in claim 1, wherein the control circuitry comprises a comparator that compares an actual current to a target current.

### Claim 8 (depends on 7)

The image sensor defined in claim 7, wherein the control circuitry is configured to couple the current source to the column output line during readout when the actual current is less than the target current.

### Claim 9 (depends on 7)

The image sensor defined in claim 7, wherein the control circuitry is configured to adjust the gain of the amplifier based on an output from the comparator.

### Claim 10 (depends on 1)

The image sensor defined in claim 1, wherein the current source is a first current source and wherein the image sensor further comprises:
a first transistor interposed between the first current source and the column output line;
second current source; and
a second transistor interposed between the second current source and the column output line.

### Claim 11 (depends on 1)

The image sensor defined in claim 1, wherein the image sensor further comprises:
a first transistor interposed between the current source and the column output line; and
a second transistor coupled between the column output line and ground.

### Claim 12

An image sensor comprising:
imaging pixels, wherein an imaging pixel of the imaging pixels comprises:
a photosensitive area;
a floating diffusion region;
a transfer transistor that is coupled between the photosensitive area and the floating diffusion region;
a capacitor; and
a dual conversion gain transistor that is coupled between the floating diffusion region and the capacitor;
a column output line that is coupled to a column of the imaging pixels that includes the imaging pixel; and
control circuitry, wherein the control circuitry comprises a comparator that compares an actual current to a target current and wherein the control circuitry is configured to control the dual conversion gain transistor during readout based on an output of the comparator.

### Claim 13 (depends on 12)

The image sensor defined in claim 12, further comprising;
a current source, wherein the control circuitry is configured to selectively couple the current source to the column output line during readout based on the output of the comparator.

### Claim 14 (depends on 13)

The image sensor defined in claim 13, wherein the current source is a first current source and wherein the image sensor further comprises:
a second current source that is coupled to the column output line.

### Claim 15 (depends on 14)

The image sensor defined in claim 14, further comprising:
a third current source that is configured to provide the target current.

### Claim 16 (depends on 12)

The image sensor defined in claim 12, wherein the imaging pixel further comprises:
a source follower transistor having a gate coupled to the floating diffusion region, wherein the actual current runs through the source follower transistor.

### Claim 17

An image sensor comprising:
an array of imaging pixels;
a column output line that is coupled to a column of the imaging pixels;
a current source;
a first transistor that is interposed between the current source and the column output line;
a second transistor that is interposed between the column output line and ground; and
control circuitry configured to selectively assert the first transistor during readout based on a comparison between an actual current and a target current.

### Claim 18 (depends on 17)

The image sensor defined in claim 17, wherein the second transistor is a precharge transistor.

### Claim 19 (depends on 17)

The image sensor defined in claim 17, wherein the control circuitry is configured to deassert the first transistor until the actual current falls below the target current.

### Claim 20 (depends on 19)

The image sensor defined in claim 19, wherein no current source is coupled to the column output line while the first transistor is deasserted.