# US 2020/0394501 A1 · Resistor circuit, artificial intelligence chip and method for manufacturing the same

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- Number: US 2020/0394501 A1
- Document ID: US20200394501A1
- Status: Published application
- Kind: A1
- Application number: 16/441,065
- Filed: 2019-06-14
- Published: 2020-12-17
- Earliest claimed: 2019-06-14
- Assignees: Macronix International Co., Ltd.
- Applicants: Macronix International Co., Ltd.
- Inventors: Shih-Hung CHEN
- Web page: https://patentgrep.com/patent/US20200394501A1

## CPC

- G06N 3/063: using electronic means
- G06N 3/04: Architecture, e.g. interconnection topology
- G06N 3/065: Analogue means
- H01C 7/18: comprising a plurality of layers stacked between terminals
- H10D 1/47: Resistors having no potential barriers
- G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- H01C: RESISTORS
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A resistor circuit, an artificial intelligence chip and a method for manufacturing the same are provided. The resistor circuit includes a stack structure. The stack structure includes resistive material layers and insulating layers stacked alternately. The resistor circuit includes at least two unit resistors electrically connected in series or parallel. The at least two unit resistors are respectively defined in the resistive material layers of different layers.

## Claims

### Claim 1

A resistor circuit, comprising:
a stack structure comprising resistive material layers and insulating layers stacked alternately, wherein the resistor circuit comprises at least two unit resistors electrically connected in series or parallel, the at least two unit resistors are respectively defined in the resistive material layers of different layers.

### Claim 2 (depends on 1)

The resistor circuit according to claim 1, wherein at least one of the resistive material layers is floating.

### Claim 3

The resistor circuit according to claim , wherein the at least two unit resistors have the same or different resistance.

### Claim 4 (depends on 1)

The resistor circuit according to claim 1, wherein the resistor circuit has an effective resistance resulted from the at least two unit resistors.

### Claim 5 (depends on 1)

The resistor circuit according to claim 1, wherein the at least two unit resistors are electrically connected in series.

### Claim 6 (depends on 1)

The resistor circuit according to claim 1, wherein the at least two unit resistors are electrically connected in parallel,

### Claim 7 (depends on 1)

The resistor circuit according to claim 1, wherein the resistive material layers have outer sidewalls aligning with each other.

### Claim 8 (depends on 1)

The resistor circuit according to claim 1, further comprising conductor elements disposed in the stack structure, the at least two unit resistors are respectively defined between different pairs of the conductor elements.

### Claim 9 (depends on 8)

The resistor circuit according to claim 8, further comprising a conductor layer disposed on the stack structure and electrically connected to the conductor elements, wherein the conductor layer comprises an input conductor portion and an output conductor portion, the resistor circuit is defined between the input conductor portion and the output conductor portion.

### Claim 10 (depends on 9)

The resistor circuit according to claim 9, wherein the conductor elements are electrically connected between one of the resistive material layers and the conductor layer.

### Claim 11 (depends on 9)

The resistor circuit according to claim 9, wherein the conductor layer further comprises a connection conductor portion electrically connected to at least two of the conductor elements and electrically connected between the input conductor portion and the output conductor portion.

### Claim 12 (depends on 11)

The resistor circuit according to claim 11, wherein the connection conductor portion electrically connects the conductor elements of different heights.

### Claim 13 (depends on 8)

The resistor circuit according to claim 8, wherein the conductor elements are extended into the stack structure with different depths from an upper surface of the stack structure.

### Claim 14 (depends on 8)

The resistor circuit according to claim 8, further comprising;
an insulating film surrounding sidewall surfaces of the conductor elements, wherein the conductor elements have an pillar shape.

### Claim 15 (depends on 1)

The resistor circuit according to claim 1, wherein the at least two unit resistors comprises;
one unit resistor defined in one resistive material layer of the resistive material layers; and
another one unit resistor defined in another one resistive material layer of the resistive material layers, the one resistive material layer and the another one resistive material layer contain a silicon material.

### Claim 16 (depends on 15)

The resistor circuit according to claim 15, wherein the one unit resistor and the another one unit resistor have different resistances, and the one resistive material layer and the another one resistive material layer have different dopant impurity and/or dopant concentration.

### Claim 17 (depends on 1)

The resistor circuit according to claim 1, wherein the resistive material layers comprise a carbon based material or a metal nitride, wherein the metal nitride comprises TiN or TaN.

### Claim 18

An artificial intelligence chip, comprising a neuromorphic computing device comprising:
a stack structure comprising resistive material layers and insulating layers stacked alternately, wherein the neuromorphic computing device comprises a resistor circuit, the resistor circuit comprises at least two unit resistors electrically connected in series or parallel, the at least two unit resistors are respectively defined in the resistive material layers of different layers, the neuromorphic computing device comprises synapse units each comprising the resistor circuit.

### Claim 19

A method for manufacturing a resistor circuit, comprising:
stacking insulating layers and resistive material layers alternately to form a stack structure;
patterning the stack structure;
forming openings in the stack structure; and
forming conductor elements in the openings.

### Claim 20 (depends on 19)

The method for manufacturing a resistor circuit according to claim 19, further comprising forming a conductor layer on the stack structure and the conductor elements.
