High voltage switching circuitry for a cross-point array
AssigneeUnity Semiconductor Corporation
InventorsChristophe Chevallier, Chang Hua Siau
Life of this patent
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Abstract
A system includes a cross-point memory array and a decoder circuit coupled to the cross-point memory array. The decoder circuit includes a predecoder having predecode logic to generate a control signal and a level shifter circuit to generate a voltage signal. The decoder circuit further includes a post-decoder coupled to the predecoder, the post-decoder including a first stage and a second stage coupled to the first stage, the control signal to control the first stage and the second stage to route the voltage signal through the first stage and the second stage to a selected conductive array line of a plurality of conductive array lines coupled to a memory array.
Claims21
(canceled)
A decoder circuit comprising:
- a predecoder comprising:
- predecode logic configured to receive at least a portion of a memory address and generate one or more predecoded signals corresponding to one or more address bits of the at least the portion of the memory address;
- and
- a level shifter circuit comprising a negative voltage level shifter, a positive voltage level shifter, and a driver, the level shifter circuit configured to generate a voltage signal on a conductive array line of a plurality of conductive array lines used to access a memory cell in a memory array, wherein the driver to set a value of the voltage signal using at least one of the negative voltage level shifter or the positive voltage level shifter based on the one or more predecoded signals.
A memory device comprising:
- a cross-point memory array;
- and
- a decoder circuit coupled to the cross-point memory array, the decoder circuit comprising:
- a predecoder comprising:
- predecode logic configured to receive at least a portion of a memory address and generate one or more predecoded signals corresponding to one or more address bits of the at least the portion of the memory address;
- and
- a level shifter circuit comprising a negative voltage level shifter, a positive voltage level shifter, and a driver, the level shifter circuit configured to generate a voltage signal on a conductive array line of a plurality of conductive array lines used to access a memory cell in the cross-point memory array, wherein the driver to set a value of the voltage signal using at least one of the negative voltage level shifter or the positive voltage level shifter based on the one or more predecoded signals.
An integrated circuit comprising:
- a substrate;
- a cross-point memory array formed above the substrate;
- and
- a base layer formed on the substrate, the base layer comprising a predecoder, the predecoder comprising:
- predecode logic configured to receive at least a portion of a memory address and generate one or more predecoded signals corresponding to one or more address bits of the at least the portion of the memory address;
- and
- a level shifter circuit comprising a negative voltage level shifter, a positive voltage level shifter, and a driver, the level shifter circuit configured to generate a voltage signal on a conductive array line of a plurality of conductive array lines used to access a memory cell in the cross-point memory array, wherein the driver to set a value of the voltage signal using at least one of the negative voltage level shifter or the positive voltage level shifter based on the one or more predecoded signals.
Dependencies are inferred from the claim text.