Uniform work function metal recess for vertical transistor complementary metal oxide semiconductor technology

A semiconductor device comprising:

• a first transistor comprising:
• a vertical fin arranged between a bottom source/drain and a top source/drain;
• a recessed gate stack arranged on a sidewall of the vertical fin;
• and
• a first spacer arranged in contact the vertical fin and on the recessed gate stack;
• and
• a second spacer arranged in contact with the first spacer and lining a sidewall of the top source/drain;
• and
• a second transistor comprising:
• a vertical fin arranged between a bottom source/drain and a top source/drain;
• a recessed gate stack arranged on a sidewall of the vertical fin;
• and
• a first spacer arranged in contact the vertical fin and on the recessed gate stack;
• and
• a second spacer arranged in contact with the first spacer and lining a sidewall of the top source/drain.

A method of making a semiconductor device, the method comprising:

• removing a first hard mask on a vertical fin of a first transistor, and a second hard mask of a vertical fin of a second transistor;
• recessing a portion of a gate stack of the first transistor, a gate stack of the second transistor, or the gate stacks of both the first transistor and the second transistor to form an opening adjacent to the vertical fin;
• depositing a first spacer material in the opening to form an inner spacer on the vertical fin of the first transistor, the second transistor, or both the first transistor and the second transistor;
• and
• depositing a second spacer material on the vertical fin of each of the first transistor and the second transistor;
• wherein the first spacer material and the second spacer material comprise different materials.