Semiconductor devices with security features

A chip, comprising:

• a circuit;
• a plurality of metal layers;
• a portion of a first sawbow line coupled to the circuit;
• and
• a portion of a second sawbow line coupled to the circuit,
• wherein the portion of the first sawbow line corresponds to the first sawbow line in a cut state and the portion of the second sawbow line corresponds to the second sawbow line in a cut state, the portion of the first sawbow line hidden under a first metal layer of the plurality of metal layers and the portion of the second sawbow line hidden under the first metal layer or a second metal layer of the plurality of metal layers, the first sawbow line and the second sawbow line on different ones of the plurality of metal layers.

A chip, comprising:

• a plurality of metal layers;
• a portion of a first sawbow line;
• and
• a portion of a second sawbow line, wherein the portion of the first sawbow line corresponds to the first sawbow line in a cut state and the portion of the second sawbow line corresponds to the second sawbow line in a cut state, the portion of the first sawbow line hidden under a first metal layer of the plurality of metal layers and the portion of the second sawbow line hidden under the first metal layer or a second metal layer of the plurality of metal layers, the first sawbow line and the second sawbow line on different ones of the plurality of metal layers.