Fan-out semiconductor package

A fan-out semiconductor package comprising:

• a first structure having a first surface and a second surface opposing the first surface;
• a first semiconductor chip disposed in the first structure and having a first active surface having first connection pads disposed thereon and a first inactive surface opposing the first active surface;
• a first connection structure disposed on the first surface of the first structure and the first active surface of the first semiconductor chip and including a first redistribution layer electrically connected to the first connection pads;
• and
• a first metal layer and a second metal layer disposed on the second surface of the first structure,
• wherein a first lower surface of the first metal layer and a second lower surface of the second metal layer are disposed at a substantially same level,
• wherein a first upper surface of the first metal layer is disposed at a higher level than a second upper surface of the second metal layer.

A fan-out semiconductor package comprising:

• a first connection structure including a first insulating layer, a first redistribution layer in the first insulating layer, and a first redistribution via penetrating through the first insulating layer and electrically connected to the first redistribution layer;
• a first semiconductor chip disposed on the first connection structure and having a first active surface having first connection pads disposed thereon and a first inactive surface opposing the first active surface;
• a first encapsulant covering a portion of the first semiconductor chip;
• a first metal pattern disposed on the first inactive surface of the first semiconductor chip and having a rectangular ring shape in a plan view;
• and
• a second metal pattern disposed to surround the first metal pattern on the first inactive surface of the first semiconductor chip.