One-time programmable memories with low power read operation and novel sensing scheme
AssigneeAttopsemi Technology Co., LTD
InventorShine C. Chung
Life of this patent
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Abstract
A time-based sensing circuit to convert resistance of a one-time programmable (OTP) element into logic states is disclosed. A one-time programmable (OTP) memory has a plurality of OTP devices. At least one of the OTP devices can have at least one OTP element that is selectively accessible via a wordline and a bitline. The bitline can be coupled a capacitor and the capacitor can be precharged and discharged. By comparing the discharge rate of the capacitor to discharge rate of a reference capacitor in a reference unit (e.g., reference cell, reference resistance, reference selector, etc.), the PRE resistance can be determined larger or smaller than a reference resistance and then converting the OTP element resistance into a logic state.
Claims24
An One-Time Programmable (OTP) memory comprises:
- a plurality of OTP cells, each of the OTP cells including an OTP element coupled to a selector, the selector having a control signal;
- a plurality of wordlines, each coupled to a plurality of the OTP cells via the control signal of the selector;
- a plurality of bitlines, each coupled to a plurality of at least one end of the OTP cells;
- at least one reference OTP cells, each of the reference OTP cells including a reference OTP element coupled to a reference selector, the reference selector having a control signal;
- at least one reference wordline, each coupled to the reference OTP cells via the control signal of the reference selector;
- and
- at least one reference bitline, each coupled to at least one end of the reference OTP cell;
- wherein the bitlines and reference bitlines are pre-charged and then are discharged at substantially the same time, and
- wherein the resistance of the OTP element is able to be determined by comparing the discharge rates of the bitline versus the reference bitline.
An electronic system, comprising:
- a processor;
- and
- a one-time programmable (OTP) memory operatively connected to the processor, the OTP memory includes at least a plurality of OTP cells for providing data storage, each of the OTP cells comprising:
- a one-time programmable (OTP) element coupled to a selector that has an enable signal;
- a plurality of wordlines coupled to the enable signals of the selector;
- a plurality of bitlines coupled to a first end of OTP cells;
- at least one reference OTP cell comprising a reference OTP resistor coupled to a reference selector that has a reference enable signal;
- at least one reference wordline coupled to the enable signal;
- and
- at least one bitline coupled to at least a first end of the reference OTP cells
- wherein both the bitline and reference bitline are able to be pre-charged to one voltage supply line and discharged to another supply voltage at substantially the same time,
- wherein the resistance of the OTP can be determined by comparing the discharge rates of the bitline and the reference bitline.
A method for operating a one-time programmable (OTP) memory, the OTP memory including:
- a plurality of OTP cells, at least one of the OTP cells including a plurality of a OTP element and a selector, the OTP element coupled to a selector;
- a plurality of wordlines coupled to the enable signal of the selector of at least one OTP cell;
- a plurality of bitlines coupled to at least a first end of the OTP cells;
- at least one reference OTP cell, the at least one of the reference OTP cell including at least one reference OTP element coupled to a reference selector;
- at least one reference wordline coupled to the enable signal of the reference selector of at least one reference OTP cell;
- at least one reference bitline coupled to at least a first end of the reference resistance cell,
- wherein the method comprises:
- charging the bitline and the reference bitline;
- ceasing charging the bitline and the reference bitline substantially at the same time;
- subsequently coupling the OTP element and the reference OTP element to the bitline and reference bitline, respectively;
- monitoring a discharge rate of the bitline and the reference bitline to reach a predetermined voltage threshold;
- and
- determining a logic state for the at least one of the OTP cells based on the discharge rates of the bitline to the reference bitline.
Dependencies are inferred from the claim text.