Dram array architecture with row hammer stress mitigation

An apparatus, comprising:

• a plurality of main word line circuits, each of the main word line circuits configured to drive a respective global word line to one of an active state value, an intermediate voltage state, or a pre-charge state;
• a plurality of sub-word line drivers, each sub-word line driver connected to a corresponding global word line and configured to drive a respective local word line between a value of the corresponding global word line and a value of a low voltage source based on a first phase signal and a second phase signal;
• a plurality of phase drivers, each phase driver of the plurality of phase drivers configured to generate the respective first phase signal and the respective second phase signal, each phase driver connected to a predetermined number of sub-word line drivers of the plurality of sub-word line drivers, where each of the predetermined number of sub-word line drivers connects to a different global word line;
• and
• a processing device operatively coupled to each of the main word line circuits, the processing device configured to drive the respective global word line to the intermediate voltage state prior to entering the pre-charge state when transitioning from the active state to the pre-charge state so as to provide row hammer stress mitigation between adjacent local word lines corresponding to the plurality of sub-word line drivers,
• wherein a voltage level of the intermediate voltage state is below a voltage level of the active state and above a voltage level of the pre-charge state.