Multi-column interleaved dimm placement and routing topology

An apparatus, comprising

• a printed circuit board (PCB);
• a first central processing unit (CPU) socket on the PCB;
• a second CPU socket on the PCB and substantially in line with the first CPU socket on the PCB;
• a first plurality of dual in-line memory module (DIMM) sockets on the PCB and interconnected with the first CPU socket, the first plurality of DIMM sockets being on first and second opposing sides of the first CPU socket;
• and
• a second plurality of DIMM sockets on the PCB and interconnected with the second CPU socket, the second plurality of DIMM sockets being on first and second opposing sides of the second CPU socket and in a direction parallel to the first plurality of DIMM sockets;
• wherein the first plurality of DIMM sockets are arranged on the PCB in at least a first column and a second column of DIMM sockets across both of the first and second opposing sides of the first CPU socket;
• and
• wherein the second plurality of DIMM sockets are arranged on the PCB in at least the second column and a third column of DIMM sockets across both of the first and second opposing sides of the second CPU socket, such that the second column of DIMM sockets contains interleaved DIMM sockets from each of the first plurality of DIMM sockets and the second plurality of DIMM sockets.