Machine learning sparse computation mechanism
AssigneeIntel Corporation
InventorsEriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajkishore Barik, Nicolas C. Galoppo Von Borries
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Abstract
Techniques to improve performance of matrix multiply operations are described in which a compute kernel can specify one or more element-wise operations to perform on output of the compute kernel before the output is transferred to higher levels of a processor memory hierarchy.
Claims22
A non-transitory machine-readable medium including instructions which, when executed by one or more processors, cause the one or more processors to perform operations associated with a machine learning framework, the machine learning framework to facilitate a matrix multiply, the operations comprising:
- loading elements of matrices into a first memory of a graphics processor of the one or more processors, wherein the first memory is a global memory of the graphics processor;
- transferring a subset of elements of the matrices from the first memory into a second memory of the graphics processor, the second memory local to a set of processing resources of the graphics processor;
- and
- triggering execution of a compute kernel on the graphics processor, wherein the compute kernel performs a matrix multiply operation on the subset of elements of the matrices, the matrix multiply operation is associated with a convolution operation, and the machine learning framework enables the compute kernel to specify one or more element-wise operations to perform on output of the matrix multiply before the output is transferred to the first memory, the one or more element-wise operations including applying an activation function to the output.
A data processing system comprising:
- a memory device;
- and
- one or more processors configured to execute instructions stored in the memory device, wherein the instructions cause the one or more processors to perform operations associated with a machine learning framework, the machine learning framework to facilitate a matrix multiply, wherein the one or more processors include a graphics processor and the instructions cause the one or more processors to:
- load elements of matrices into a first memory of the graphics processor, wherein the first memory is a global memory of the graphics processor;
- transfer a subset of elements of the matrices from the first memory into a second memory of the graphics processor, the second memory local to a set of processing resources of the graphics processor;
- and
- trigger execution of a compute kernel on the graphics processor, wherein the compute kernel is to cause the graphics processor to perform a matrix multiply operation on the subset of elements of the matrices, the matrix multiply operation is associated with a convolution operation, and the machine learning framework enables the compute kernel to specify one or more element-wise operations to perform on output of the matrix multiply before the output is transferred to the first memory, the one or more element-wise operations including applying an activation function to the output.
A method comprising:
- loading elements of matrices into a first memory of a graphics processor of one or more processors of a data processing system, wherein the first memory is a global memory of the graphics processor;
- transferring a subset of elements of the matrices from the first memory into a second memory of the graphics processor, the second memory local to a set of processing resources of the graphics processor;
- and
- triggering execution of a compute kernel on the graphics processor, wherein the compute kernel performs a matrix multiply operation on the subset of elements of the matrices, the matrix multiply operation is associated with a convolution operation, and a machine learning framework provides primitives to enable the compute kernel to specify one or more element-wise operations to perform on output of the matrix multiply before the output is transferred to the first memory, the one or more element-wise operations including applying an activation function to the output.
An electronic device comprising:
- first logic, as facilitated by or at least partially incorporated into a processor, to load elements of matrices into a first memory of the processor, wherein the first memory is a global memory;
- second logic to transfer a subset of elements of the matrices from the first memory into a second memory, the second memory local to a set of processing resources of the processor;
- and
- third logic to execute a compute kernel on the processor, the compute kernel to perform a matrix multiply operation on the subset of elements of the matrices, wherein the matrix multiply operation is associated with a convolution operation, the compute kernel is to specify one or more element-wise operations to perform on output of the matrix multiply before the output is transferred to the first memory, and the one or more element-wise operations include to apply an activation function to the output.
Dependencies are inferred from the claim text.