Incremental generation of quantum circuits

A computer usable program product comprising a computer-readable storage device, and program instructions stored on the storage device, the stored program instructions comprising:

• program instructions to generate a first gate index for a first quantum circuit, the first gate index comprising a first set of quantum logic gates detected in the first quantum circuit, each quantum logic gate of the first set of quantum logic gates including a corresponding set of qubits acted on by the quantum logic gate;
• program instruction to compare the first gate index with a second gate index of a second quantum circuit to determine a structural similarity of the first quantum circuit and the second quantum circuit;
• and
• program instruction to parameterize, in response to determining a structural equality of the first quantum circuit and the second quantum circuit, a first set of parameters of a second set of quantum logic gates of the second quantum circuit with a second set of parameters of the first set of quantum logic gates.

A computer system comprising a processor, a computer-readable memory, and a computer-readable storage medium, and program instructions stored on the storage medium for execution by the processor via the memory, the stored program instructions comprising:

• program instructions to generate a first gate index for a first quantum circuit, the first gate index comprising a first set of quantum logic gates detected in the first quantum circuit, each quantum logic gate of the first set of quantum logic gates including a corresponding set of qubits acted on by the quantum logic gate;
• program instruction to compare the first gate index with a second gate index of a second quantum circuit to determine a structural similarity of the first quantum circuit and the second quantum circuit;
• and
• program instruction to parameterize, in response to determining a structural equality of the first quantum circuit and the second quantum circuit, a first set of parameters of a second set of quantum logic gates of the second quantum circuit with a second set of parameters of the first set of quantum logic gates.