Pipette type patch clamp, measuring device having the patch clamp, and method of manufacturing the patch clamp
AssigneeIndustry-Academic Cooperation Foundation, Dankook University
InventorsJae-Hyoung Park, Yoon Jae Nam, Seung-Ki Lee
Life of this patent
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Abstract
Disclosed are a pipette type patch clamp, a measuring device having the patch clamp, and a method of manufacturing the patch clamp. The pipette type patch clamp includes a pipette type puller having a through region with a predetermined length such that an object is sucked therethrough, a silicon wafer configured to support the puller, an insulating layer disposed on a surface of the silicon wafer and a surface of the puller, and an electrode layer disposed on a surface of the insulating layer to connect to a first fluid channel and a second fluid channel
Claims10
A measuring device having a patch clamp, the measuring device comprising:
- a patch clamp;
- a first fluid channel disposed on the top of the patch clamp;
- and
- a second fluid channel disposed on the bottom of the patch clamp,
- wherein the patch clamp comprises:
- a puller having a through region with a predetermined length such that an object is sucked therethrough;
- a silicon wafer configured to support the puller;
- an insulating layer disposed on a surface of the silicon wafer and a surface of the puller;
- and
- an electrode layer disposed on a surface of the insulating layer.
A patch clamp, comprising:
- a puller having a through region with a predetermined length such that an object is sucked therethrough;
- a silicon wafer configured to support the puller;
- an insulating layer disposed on a surface of the silicon wafer and a surface of the puller;
- and
- an electrode layer disposed on a surface of the insulating layer to connect to a first fluid channel disposed on the top of the patch clamp and a second fluid channel disposed on the bottom of the patch clamp.
A method of manufacturing a patch clamp, the method comprising:
- a first step of etching a peripheral region of a first type filler while leaving the first type filler in a silicon wafer in a downward direction from a top surface of the silicon wafer;
- a second step of bonding a glass wafer to the top surface of the silicon wafer;
- a third step of forming a first type puller by filling the peripheral region etched in the first step with glass through a reflow process of the glass wafer, wherein the filler of the silicon wafer is positioned at a center of the first type puller;
- a fourth step of etching a peripheral region of the puller in the silicon wafer, after removing the glass wafer present on the top surface of the silicon wafer;
- a fifth step of forming a second type puller from the first type puller by additionally performing a reflow of glass on the first type puller;
- a sixth step of etching the filler of the silicon wafer positioned at a center of the second type puller;
- a seventh step of etching in an upward direction from a bottom surface of the silicon wafer to the bottom of the second type puller;
- an eighth step of disposing an insulating layer on the top surface of the silicon wafer, the bottom surface of the silicon wafer, and a surface of the second type puller;
- and
- a ninth step of disposing an electrode layer on a surface of the insulating layer.
Dependencies are inferred from the claim text.