Semiconductor integrated circuit device
AssigneeSocionext Inc.
InventorJunji Iwahori
Life of this patent
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Abstract
A layout structure of a capacitance cell using vertical nanowire (VNW) FETs is provided. The capacitance cell includes a plurality of first-conductivity type VNW FETs lining up in the X direction, provided between a first power supply interconnect and a second power supply interconnect. The plurality of first-conductivity type VNW FETs include at least one first VNW FET having a top and a bottom connected with the first power supply interconnect and a gate connected with the second power supply interconnect.
Claims11
A semiconductor integrated circuit device including a standard cell that is a capacitance cell, wherein
- the standard cell includes
- a first power supply interconnect extending in a first direction, configured to supply a first power supply voltage,
- a second power supply interconnect extending in the first direction, configured to supply a second power supply voltage different from the first power supply voltage, and
- a plurality of first-conductivity type vertical nanowire (VNW) FETs lining up in the first direction, provided between the first power supply interconnect and the second power supply interconnect, and
- the plurality of first-conductivity type VNW FETs include
- at least one first VNW FET having a top and a bottom connected with the first power supply interconnect and a gate connected with the second power supply interconnect.
A semiconductor integrated circuit device including a standard cell that is a capacitance cell, wherein
- the standard cell includes
- a first power supply interconnect extending in a first direction, configured to supply a first power supply voltage,
- a second power supply interconnect extending in the first direction, configured to supply a second power supply voltage different from the first power supply voltage,
- a first capacitance part having a plurality of first-conductivity type vertical nanowire (VNW) FETs lining up in the first direction, provided between the first power supply interconnect and the second power supply interconnect, and
- a fixed value output part having a second-conductivity type VNW FET provided between the first power supply interconnect and the second power supply interconnect, configured to supply the second power supply voltage to the first capacitance part, and
- the plurality of first-conductivity type VNW FETs of the first capacitance part include
- at least one first VNW FET having a top and a bottom connected with the first power supply interconnect and a gate connected with a top of the second-conductivity type VNW FET of the fixed value output part.
Dependencies are inferred from the claim text.