Single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor
AssigneeRichview Electronics Co., Ltd.
InventorsSiping Bai, Xianglan Wu, Zhijian Wang, Zhigang Yang, Jinqiang Zhang
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AssigneeRichview Electronics Co., Ltd.
InventorsSiping Bai, Xianglan Wu, Zhijian Wang, Zhigang Yang, Jinqiang Zhang
Estimating the term…
A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board comprises the following steps: drilling a hole on a substrate, the hole comprising a blind hole and/or a through hole; on a surface of the substrate, forming a photoresist layer having a circuit negative image; forming a conductive seed layer on the surface of the substrate and a hole wall of the hole; removing the photoresist layer, and forming a circuit pattern on the surface of the substrate, wherein forming a conductive seed layer comprises implanting a conductive material below the surface of the substrate and below the hole wall of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.
A multi-layer circuit board, successively constituted by metal foil, middle sticking layer, single-layer circuit board, middle sticking layer, single-layer circuit board, middle sticking layer, metal foil, said multi-layer circuit board is provided with a hole, a hole wall of said hole is formed with conductive seed layer, and partial region of said metal foil is removed to form a circuit pattern layer, wherein said conductive seed layer comprises a ion implantation layer implanted below the hole wall of said hole.
A multi-layer circuit board, successively constituted by surface sticking layer, single-layer circuit board, middle sticking layer, single-layer circuit board, surface sticking layer, said multi-layer circuit board is provided with a hole, a hole wall of said hole is formed with conductive seed layer, and partial outer surface of said surface sticking layer is formed with a circuit pattern layer of conductive seed layer, wherein said conductive seed layer comprises a ion implantation layer implanting below the hole wall of said hole and below partial outer surface of said surface sticking layer.
Dependencies are inferred from the claim text.