Neural network accelerating device and method of controlling the same

A method for controlling an accelerating device, the method comprising:

• converting a first input signal and a second input signal into a first converted input signal and a second converted input signal, respectively;
• generating a final zero-value flag signal, a first one-value flag signal, and a second one-value flag signal;
• and
• skipping a first arithmetic operation and a second arithmetic operation when the final zero-value flag signal has a first value, the first value of the final zero-value flag indicating that the first input signal, or the second input signal, or both have a value of 0.

A processing system, comprising:

• a memory configured to store data and output input signals in response to a request signal from a host;
• an accelerating device configured to receive the input signals and perform one or more given arithmetic operations on the input signals, the input signals including a first input signal and a second input signal, the accelerating device including:
• a signal detector configured to convert the first input signal and the second input signal into a first converted input signal and a second converted input signal, respectively, and to generate a final zero-value flag signal, a first one-value flag signal, and a second one-value flag signal;
• and
• a processing element (PE) configured to process the first converted input signal and the second converted input signal based on the final zero-value flag signal, the first one-value flag signal, and the second one-value flag signal, and to skip a first arithmetic operation and a second arithmetic operation when the final zero-value flag signal has a first value, the first value of the final zero-value flag signal indicating that the first input signal, or the second input signal, or both have a value of 0.