# US 2020/0287698 A1 · Communication hardware virtualization

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- Number: US 2020/0287698 A1
- Document ID: US20200287698A1
- Status: Published application
- Kind: A1
- Application number: 16/648,306
- Filed: 2018-09-18
- Published: 2020-09-10
- Earliest claimed: 2017-09-19
- Assignees: Universiteit Gent; Imec Vzw
- Applicants: Universiteit Gent; Imec Vzw
- Inventors: Xianjun JIAO; Wei LIU; Felipe Augusto PEREIRA DE FIGUEIREDO; Ingrid MOERMAN
- Web page: https://patentgrep.com/patent/US20200287698A1

## CPC

- H04B 1/006: {using switches for selecting the desired band (H04B1/0057 takes precedence)}
- H04L 5/10: with dynamo-electric generation of carriers; with mechanical filters or demodulators
- H04B 1/0003: {Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain (digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00)}
- H04B 1/0007: {wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage}
- H04B 1/06: Receivers
- H04B 1/406: {with more than one transmission mode, e.g. analog and digital modes}
- H04L 1/1838: {for semi-reliable protocols, e.g. for less sensitive applications such as streaming video (buffer level management for video bitstream receiver H04N21/44004)}
- H04L 5/12: the signals being represented by different phase modulations of a single carrier
- H04L 27/233: using non-coherent demodulation
- H04L 27/364: {Arrangements for overcoming imperfections in the modulator, e.g. quadrature error or unbalanced I and Q levels}
- H04W 72/0446: Resources in time domain, e.g. slots or frames
- H04W 88/16: Gateway arrangements
- H04B: TRANSMISSION
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72)

## Abstract

A communication system comprising: input buffers adapted for buffering incoming data streams of samples from one or more channels; a receiver adapted for sequentially processing data from the input buffers; a processing rate of the receiver is higher than or equal to an incoming data rate of the incoming data; context memory adapted for saving an internal status of the receiver after processing the data corresponding with an input buffer before switching to a next input buffer and for restoring the internal status, wherein the receiver is adapted for processing the incoming data in a frame detection phase, and in a frame demodulation phase in which frames and/or subframes are demodulated into bits and wherein the internal status of the receiver related to an input buffer is only saved and restored in the frame detection phase or before and after demodulating subframes.

## Claims

### Claim at position 1

-12. (canceled)

### Claim 13

A communication system for receiving incoming data streams of samples from one or more channels, the communication system comprising:
a plurality of input buffers adapted for buffering the incoming data streams,
a receiver adapted for sequentially processing data from the different input buffers wherein a processing rate of the receiver is higher than or equal to an incoming data rate of the incoming data,
wherein the receiver is adapted for processing the incoming data in a frame detection phase in which a start point of frames and/or subframes in the incoming data is detected, and in a frame demodulation phase in which the frames and/or subframes are demodulated into bits,
an that the communication system comprises context memory adapted for saving an internal status of the receiver after processing the data corresponding with an input buffer before switching to a next input buffer and for restoring the internal status of the receiver with a saved internal status related to the next input buffer before switching to the next input buffer wherein the internal status of the receiver related to an input buffer is only saved and restored in the frame detection phase or before and after demodulating subframes.

### Claim 14 (depends on 13)

The communication system according to claim 13 wherein the incoming data streams of samples are coming from different standards within the one or more channels and wherein the input buffers are adapted for buffering the incoming data streams.

### Claim 15 (depends on 13)

The communication system according to claim 13, the input buffers, the receiver and the context memory are implemented at hardware level.

### Claim 16 (depends on 13)

The communication system according to claim 13, the communication system comprising a block buffer per incoming buffer wherein the communication system is adapted for triggering transfer of the incoming data from the input buffer to the block buffer when the start point of the frame or subframe is detected and for transferring complete frames or subframes in the block buffer.

### Claim 17 (depends on 16)

The communication system according to claim 16, wherein the input buffers, the receiver, the context memory and the block buffers are implemented at hardware level.

### Claim 18 (depends on 13)

The communication system according claim 13, wherein the incoming data is subdivided in sets which correspond with different standards.

### Claim 19 (depends on 13)

The communication system according to claim 13, the communication system comprising a channelizer adapted for receiving a plurality of channels from a broadband front end and connected with the input buffers for filling the input buffers with incoming data from the plurality of channels.

### Claim 20 (depends on 13)

The communication system according to claim 13 implemented in a single integrated chip.

### Claim 21 (depends on 13)

A network system, the network system comprising at least one transmitter or a plurality of transmitters adapted for transmitting data over a plurality of channels, and at least one communication system in accordance with claim 13 for receiving the data from the different channels.

### Claim 22

A method for processing data streams of samples coming from one or more channels, the method comprising:
buffering the incoming data streams of samples,
sequentially processing the data from the incoming data streams of samples at a processing rate which is higher than or equal to an incoming data rate of the incoming data, wherein the data is processed in a frame detection phase in which a start point of frames and/or subframes in the incoming data is detected, and in a frame demodulation phase in which the frames and/or subframes are demodulated into bits, and
wherein the method is saving an internal status related to the processing of data of a data stream of samples before processing the data of a next data stream of samples and restoring an internal status related the processing of the next data stream of samples before switching to the next data stream of samples wherein the internal status of the receiver related to a data stream of samples is only saved and restored in the frame detection phase or before and after demodulating subframes.

### Claim 23 (depends on 22)

The method according to claim 22 wherein the incoming data streams of samples are coming from different standards within the one or more channels.

### Claim 24 (depends on 13)

A gateway for receiving data from a first network and transmitting the data to a second network, the gateway comprising a communication system in accordance with claim 13 wherein the gateway is adapted for receiving the data from the first network using the communication system and for transmitting the received data to the second network.
