US 2020/0266702 A1 · ADAPTIVE RAMP SIGNAL GENERATION

Abstract

Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first charging path including a first capacitor coupled to a first output node. The circuit further includes a second charging path comprising a first switch and a second capacitor. The circuit further includes a third charging path comprising a second switch and a third capacitor. The circuit further includes a first discharging path comprising the second capacitor, a third switch coupled between the second charging path and a second output node, and a fourth switch coupled between the second charging path and a fourth node. The circuit further includes a second discharging path comprising the third capacitor, a fifth switch coupled between the third charging path and the second output node, and a sixth switch coupled between the third node and the fourth node.

Claims34

Dependent claims

A circuit, comprising:

a first charging path including a first capacitor coupled to a first output node;
a second charging path comprising a first switch and a second capacitor;
a third charging path comprising a second switch and a third capacitor;
a first discharging path comprising the second capacitor, a third switch coupled between the second charging path and a second output node, and a fourth switch coupled between the second charging path and a fourth node;
and
a second discharging path comprising the third capacitor, a fifth switch coupled between the third charging path and the second output node, and a sixth switch coupled between the third node and the fourth node.

3 more elements

A circuit, comprising:

a current signal generation circuit configured to generate a current signal based on an input voltage value, an output voltage value, and a frequency of operation;
and
a ramp signal generation circuit coupled to the current signal generation circuit and configured to:
generate a first ramp signal by charging a first capacitor based on the current signal, wherein a voltage of the first capacitor while charging is the first ramp signal;
and
generate a second ramp signal by charging a second capacitor and a third capacitor based on a scaled version of the current signal, wherein a voltage of the second capacitor while discharging is the second ramp signal during a first period, and wherein a voltage of the third capacitor while discharging is the second ramp signal during a second period.

3 more elements

A system, comprising:

a power converter;
and
a controller coupled to the power converter and comprising:
a current signal generation circuit configured to generate a current signal based on an input voltage value of the power converter, an output voltage value of the power converter, and a switching frequency of the power converter;
a ramp signal generation circuit configured to:
generate a first ramp signal by charging a first capacitor based on the current signal, wherein a voltage of the first capacitor while charging is the first ramp signal;
and
generate a second ramp signal by charging a second capacitor and a third capacitor based on a scaled version of the current signal, wherein a voltage of the second capacitor while discharging is the second ramp signal during a first period, and wherein a voltage of the third capacitor while discharging is the second ramp signal during a second period;
and
a comparator configured to:
compare the first ramp signal or the second ramp signal to an error signal determined at least partially according to an output current of the power converter;
and
generate a pulse-width modulation signal, based on the comparison, to specify a duty cycle for the power converter.

10 more elements

A circuit, comprising:

a first transistor comprising a collector terminal coupled to a first node, an emitter terminal coupled to a ground node, and a base terminal coupled to a second node;
a second transistor comprising a collector terminal coupled to a third node, an emitter terminal coupled to a fourth node, and a base terminal coupled to a fifth node;
a third transistor comprising a collector terminal coupled to a sixth node, an emitter terminal coupled to a seventh node, and a base terminal coupled to the fifth node;
and
a fourth transistor comprising a collector terminal coupled to an eighth node, an emitter terminal coupled to the ground node, and a base terminal coupled to the seventh node.

2 more elements

Dependencies are inferred from the claim text.

Adaptive ramp signal generation

Life of this patent

Adaptive ramp signal generation

Life of this patent

Abstract

Claims34