Nanosheet channel-to-source and drain isolation

A method of fabricating a semiconductor device, the method comprising:

• providing first and second nanosheet fins, wherein each of the first nanosheet fin and the second nanosheet fin comprises at least two first layers and at least two second layers disposed on a substrate, wherein the at least two first layers are arranged alternatingly with the at least two second layers, wherein the first and second nanosheet fins are adjacent and in-line, and wherein the first and second nanosheet fins are separated by a trench filled with a trench-dielectric;
• depositing a dummy gate-dielectric layer over the first and second nanosheet fins and the trench-dielectric;
• forming a dummy gate stack and sidewall spacers over a portion of the first nanosheet fin;
• etching the first nanosheet fin using the dummy gate stack and sidewall spacers as an etch-mask to expose sidewalls of the at least two first layers and the at least two second layers,
• recessing the sidewalls of the at least two second layers with respect to sidewalls of the at least two first layers to form divots;
• filling the divots to form inner spacers;
• epitaxially growing a source-drain region contacting exposed sidewalls of the at least two first layers and remaining trench-dielectric;
• removing the dummy gate stack to leave an opening between the sidewall spacers;
• selectively removing the at least two second layers and the dummy gate-dielectric layer;
• depositing a high-k gate dielectric layer and a work-function metal layer on and between the exposed portions of the at least two first layers;
• and
• depositing a gate metal on exposed portions of the work-function metal layer.

A device comprising:

• a nanosheet stack comprising:
• a first layer and a second layer, the second layer disposed above and separated from the first layer;
• a first pair of inner spacers underpinning opposite sides of the first layer;
• and
• a second pair of inner spacers between the first layer and the second layer, the second pair of inner spacers underpinning opposite sides of the second layer;
• a first source-drain region on one side of the nanosheet stack, the first source-drain region contacting the first layer, the second layer and a first trench dielectric;
• a second source-drain region on the opposite side of the nanosheet stack from the first source-drain region, the second source-drain region contacting the first layer, the second layer and a second trench dielectric;
• and
• a high-k gate dielectric layer and a work-function metal layer on and between the first and second layers.

A device comprising:

• a first nanosheet fin comprising at least a first layer and a second layer, the first nanosheet fin further comprising a first inner spacer under the first layer and a second inner spacer under the second layer;
• a second nanosheet fin comprising at least a third layer, and a fourth layer, the first nanosheet fin further comprising a third inner spacer under the third layer and a fourth inner spacer under the fourth layer, wherein the first and second nanosheet fins are adjacent and in-line, and wherein the first and second nanosheet fins are separated by a trench filled with a trench-dielectric;
• a source-drain region adjacent the second layer, the fourth layer, the sixth layer, the eighth layer, and the trench-dielectric;
• a high-k gate dielectric layer and a work-function metal layer on and between the first layer, the second layer, the third layer, and the fourth layer;
• and
• a gate metal on the high-k gate dielectric layer and a work-function metal layer.