Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsYun Tae Lee, Jung Ho Shim, Han KIM
Life of this patent
Estimating the term…
Abstract
The present disclosure relates to a semiconductor package including a first semiconductor chip having a first surface on which first connection pads are disposed, and a second surface on which second connection pads are disposed, and including through-vias connected to the second connection pads; a connection structure disposed on the first surface and including a first redistribution layer; a first redistribution disposed on the second surface; and a second semiconductor chip disposed on the connection structure. The first connection pads are connected to a signal pattern of the first redistribution layer, and the second connection pads are connected to at least one of a power pattern and a ground pattern of the second redistribution layer.
Claims16
A semiconductor package, comprising:
- a first semiconductor chip having a first surface and a second surface opposing the first surface, and including first and second connection pads disposed on the first and second surfaces, respectively, and through-vias connected to the second connection pads;
- an connection structure disposed on the first surface of the first semiconductor chip and including a first redistribution layer electrically connected to the first connection pads of the first semiconductor chip;
- a second redistribution layer disposed on the second surface of the first semiconductor chip and electrically connected to the second connection pads of the first semiconductor chip;
- and
- a second semiconductor chip disposed on a third surface of the connection structure opposing a fourth surface of the connection structure on which the first semiconductor chip is disposed, wherein a surface of the second semiconductor chip, on which third connection pads of the second semiconductor chip are disposed, faces the third surface of the connection structure, and
- wherein the first connection pads of the first semiconductor chip are connected to a signal pattern of the first redistribution layer, and the second connection pads of the first semiconductor chip are connected to at least one of a power pattern and a ground pattern of the second redistribution layer.
A semiconductor package, comprising:
- a first semiconductor chip having a first surface and a second surface opposing the first surface, and including first connection pads for transmitting and receiving signals disposed on the first surface and second connection pads for receiving power disposed on the second surface, and through-vias connected to the second connection pads;
- a connection structure disposed on the first surface of the first semiconductor chip, and including a first redistribution layer electrically connected to the first connection pads of the first semiconductor chip;
- and
- at least one second semiconductor chip disposed on a third surface of the connection structure opposing a fourth surface of the connection structure on which the first semiconductor chip is disposed, and a surface of the second semiconductor chip on which third connection pads of the second semiconductor chip are disposed faces the third surface of the connection structure.
Dependencies are inferred from the claim text.